Analysis of a Lateral Grain Boundary for Reducing Performance Variations in Poly-Si 1T-DRAM

por Yoo, Songyi, Sun, Wookyung, Shin, Hyungsoon
Publicado 2020

New Simulation Method for Dependency of Device Degradation on Bending Direction and Channel Length

por Choi, Yunyeong, Park, Jisun, Shin, Hyungsoon
Publicado 2021

Circuit Optimization Method to Reduce Disturbances in Poly-Si 1T-DRAM

por Ha, Yejin, Shin, Hyungsoon, Sun, Wookyung, Park, Jisun
Publicado 2021

A Unified Current-Voltage Model for Metal Oxide-Based Resistive Random-Access Memory

por Chung, Harry, Shin, Hyungsoon, Park, Jisun, Sun, Wookyung
Publicado 2022

Memristor Neural Network Training with Clock Synchronous Neuromorphic System

por Jo, Sumin, Sun, Wookyung, Kim, Bokyung, Kim, Sunhee, Park, Junhee, Shin, Hyungsoon
Publicado 2019

Analysis of the Sensing Margin of Silicon and Poly-Si 1T-DRAM

por Kim, Hyeonjeong, Yoo, Songyi, Kang, In-Man, Cho, Seongjae, Sun, Wookyung, Shin, Hyungsoon
Publicado 2020