RTL modeling with SystemVerilog for simulation and synthesis: using SystemVerilog for ASIC and FPGA design

por Sutherland, Stuart
Publicado 2017

The Verilog PLI handbook: a user's guide comprehensive reference on the Verilog programming language interface

por Sutherland, Stuart
Publicado 1999

Verilog and SystemVerilog gotchas: 101 common coding errors and how to avoid them

por Sutherland, Stuart, Mills, Don
Publicado 2010

SystemVerilog for design: a guide to using systemverilog for hardware design and modeling

por Sutherland, Stuart, Davidmann, Simon, Flake, Peter
Publicado 2003

SystemVerilog for design: a guide to using SystemVerilog for hardware design and modeling

por Sutherland, Stuart, Davidmann, Simon, Flake, Peter
Publicado 2006

Genomic Education at Scale: The Benefits of Massive Open Online Courses for the Healthcare Workforce

por Bishop, Michelle, Miller, Edward, McPherson, Amelia, Simpson, Siobhan, Sutherland, Stuart, Seller, Anneke
Publicado 2019