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20211108202718.0 |
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|c 94532
|d 94532
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|a 0792398920
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|a DLC
|b spa
|e rda
|c UV#
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| 050 |
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4 |
|a TK7868.L6
|b S96
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| 082 |
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4 |
|a 621.39/5
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| 245 |
0 |
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|a Synthesis of finite state machines :
|b logic optimization /
|c Tiziano Villa ...[et al.].
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| 260 |
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|a Boston :
|b Kluwer Academic,
|c c1997.
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| 300 |
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|a xiii, 381 p. :
|b il. ;
|c 25 cm.
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| 336 |
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|2 rdacontent
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| 337 |
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|2 rdamedia
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| 338 |
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|2 rdacarrier
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| 504 |
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|a Bibliografía: p. 359-377.
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| 650 |
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4 |
|a Diseño lógico
|x Procesamiento de datos.
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| 650 |
|
4 |
|a Teoría de las máquinas secuenciales.
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| 650 |
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4 |
|a Circuitos integrados
|x Diseño asistido por computadora.
|
| 700 |
1 |
2 |
|a Villa, Tiziano,
|d 1953-
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| 902 |
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|a DBUV
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| 942 |
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|c NOCTURNO
|
