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Evaluation of Data Transmission at 80MHz and 160MHz Over Backplane, Copper and Optical Links

The bunch clock frequency of the LHC accelerator at CERN is specified as 40.07897 MHz [1]. Most of the LHC experiments will utilize this frequency, its multiples or derivatives as the main frequency of data transmission for their synchronous Trigger and DAQ electronic systems. For example, the trigg...

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Detalles Bibliográficos
Autores principales: Matveev, Mikhail, Lee, S J, Padley, P
Lenguaje:eng
Publicado: CERN 2007
Materias:
Acceso en línea:https://dx.doi.org/10.5170/CERN-2007-001.488
http://cds.cern.ch/record/1034305
Descripción
Sumario:The bunch clock frequency of the LHC accelerator at CERN is specified as 40.07897 MHz [1]. Most of the LHC experiments will utilize this frequency, its multiples or derivatives as the main frequency of data transmission for their synchronous Trigger and DAQ electronic systems. For example, the triggering system of the Cathode Strip Chamber (CSC) sub-detector at the CMS experiment comprises the onchamber anode and cathode electronics, the off-chamber boards housed in 9U crates mounted on the periphery of the Endcap iron disks, and one Track Finder (TF) crate located in the underground counting room (Fig.1). Due to the significant amount of data from the front end, the trigger patterns are multiplexed and sent from the CSC chambers over copper cables using the LVDS standard at 80 MHz. For the same reason the data patterns transmitted over backplanes in the peripheral and TF crates are also multiplexed and sent at 80MHz using the GTLP standard. Optical links from the peripheral crates to the TF are operated at 80 MHz as well. Finally, the parallel LVDS links to the Global Muon Trigger (GMT) run at 40 MHz.