The OTIS Reference Manual

This document describes the port definitions, electrical specifications, modes of operation and programming sequences of the OTIS TDC. The chip is developed for the Outer Tracker of the LHCb experiment. OTIS1.0 is the first full-scale prototype of this 32 channel TDC and has been submitted in April 2002 in a standard 0.25µm CMOS process. Within the clock driven architecture of the chip a DLL provides the reference for the drift time measurement. The drift time data of every channel is stored in the pipeline memory until a trigger decision arrives. A control unit provides memory and trigger management and handles data transmission to the subsequent DAQ stage. The latest chip version is OTIS1.3.