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FPGA based Readout Logic of the Front-end Electronics of the ATLAS Absolute Luminosity Monitor

Readout of data from front-end electronics of the ATLAS Absolute Luminosity Monitor is controlled by programmable devices. Alfa-R is a local readout controller which reads digitized data with LHC clock and keeps them until validation of the first level trigger. Alfa-M is a global readout controller...

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Detalles Bibliográficos
Autor principal: Iwanski, W
Lenguaje:eng
Publicado: CERN 2007
Materias:
Acceso en línea:https://dx.doi.org/10.5170/CERN-2007-007.458
http://cds.cern.ch/record/1091527
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author Iwanski, W
author_facet Iwanski, W
author_sort Iwanski, W
collection CERN
description Readout of data from front-end electronics of the ATLAS Absolute Luminosity Monitor is controlled by programmable devices. Alfa-R is a local readout controller which reads digitized data with LHC clock and keeps them until validation of the first level trigger. Alfa-M is a global readout controller which reads validated events from 23 Alfa-R controllers, forms a data block and sends it to an acquisition system. In this article, description of logic of both controllers is presented as well as is shown how the controllers can be set up and monitored from an user level.
id cern-1091527
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2007
publisher CERN
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spelling cern-10915272019-09-30T06:29:59Zdoi:10.5170/CERN-2007-007.458http://cds.cern.ch/record/1091527engIwanski, WFPGA based Readout Logic of the Front-end Electronics of the ATLAS Absolute Luminosity MonitorAccelerators and Storage RingsReadout of data from front-end electronics of the ATLAS Absolute Luminosity Monitor is controlled by programmable devices. Alfa-R is a local readout controller which reads digitized data with LHC clock and keeps them until validation of the first level trigger. Alfa-M is a global readout controller which reads validated events from 23 Alfa-R controllers, forms a data block and sends it to an acquisition system. In this article, description of logic of both controllers is presented as well as is shown how the controllers can be set up and monitored from an user level.CERNoai:cds.cern.ch:10915272007
spellingShingle Accelerators and Storage Rings
Iwanski, W
FPGA based Readout Logic of the Front-end Electronics of the ATLAS Absolute Luminosity Monitor
title FPGA based Readout Logic of the Front-end Electronics of the ATLAS Absolute Luminosity Monitor
title_full FPGA based Readout Logic of the Front-end Electronics of the ATLAS Absolute Luminosity Monitor
title_fullStr FPGA based Readout Logic of the Front-end Electronics of the ATLAS Absolute Luminosity Monitor
title_full_unstemmed FPGA based Readout Logic of the Front-end Electronics of the ATLAS Absolute Luminosity Monitor
title_short FPGA based Readout Logic of the Front-end Electronics of the ATLAS Absolute Luminosity Monitor
title_sort fpga based readout logic of the front-end electronics of the atlas absolute luminosity monitor
topic Accelerators and Storage Rings
url https://dx.doi.org/10.5170/CERN-2007-007.458
http://cds.cern.ch/record/1091527
work_keys_str_mv AT iwanskiw fpgabasedreadoutlogicofthefrontendelectronicsoftheatlasabsoluteluminositymonitor