MAPS in 130 nm triple well CMOS technology for HEP applications

Deep N-well CMOS monolithic active pixel sensors (DNWMAPS) represent an alternative approach to signal processing in pixellated detectors for high energy physics experiments. Based on different resolution constraints, two prototype MAPS, suitable for applications requiring different detector pitch,...

Descripción completa

Detalles Bibliográficos
Autores principales: Pozzati, E, Manghisoni, M, Ratti, L, Re, V, Speziali, V, Traversi, G
Lenguaje:eng
Publicado: CERN 2007
Materias:
Accelerators and Storage Rings
Acceso en línea:https://dx.doi.org/10.5170/CERN-2007-007.492
http://cds.cern.ch/record/1091744
_version_ 1780913795544121344
author Pozzati, E
Manghisoni, M
Ratti, L
Re, V
Speziali, V
Traversi, G
author_facet Pozzati, E
Manghisoni, M
Ratti, L
Re, V
Speziali, V
Traversi, G
author_sort Pozzati, E
collection CERN
description Deep N-well CMOS monolithic active pixel sensors (DNWMAPS) represent an alternative approach to signal processing in pixellated detectors for high energy physics experiments. Based on different resolution constraints, two prototype MAPS, suitable for applications requiring different detector pitch, have been developed and fabricated in 130 nm triple well CMOS technology. This work presents experimental results from the characterization of some test structures together with TCAD and Monte Carlo simulations intended to study the device properties in terms of charge diffusion and charge sharing among pixels.
id cern-1091744
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2007
publisher CERN
record_format invenio
spelling cern-10917442019-09-30T06:29:59Zdoi:10.5170/CERN-2007-007.492http://cds.cern.ch/record/1091744engPozzati, EManghisoni, MRatti, LRe, VSpeziali, VTraversi, GMAPS in 130 nm triple well CMOS technology for HEP applicationsAccelerators and Storage RingsDeep N-well CMOS monolithic active pixel sensors (DNWMAPS) represent an alternative approach to signal processing in pixellated detectors for high energy physics experiments. Based on different resolution constraints, two prototype MAPS, suitable for applications requiring different detector pitch, have been developed and fabricated in 130 nm triple well CMOS technology. This work presents experimental results from the characterization of some test structures together with TCAD and Monte Carlo simulations intended to study the device properties in terms of charge diffusion and charge sharing among pixels.CERNoai:cds.cern.ch:10917442007
spellingShingle Accelerators and Storage Rings
Pozzati, E
Manghisoni, M
Ratti, L
Re, V
Speziali, V
Traversi, G
MAPS in 130 nm triple well CMOS technology for HEP applications
title MAPS in 130 nm triple well CMOS technology for HEP applications
title_full MAPS in 130 nm triple well CMOS technology for HEP applications
title_fullStr MAPS in 130 nm triple well CMOS technology for HEP applications
title_full_unstemmed MAPS in 130 nm triple well CMOS technology for HEP applications
title_short MAPS in 130 nm triple well CMOS technology for HEP applications
title_sort maps in 130 nm triple well cmos technology for hep applications
topic Accelerators and Storage Rings
url https://dx.doi.org/10.5170/CERN-2007-007.492
http://cds.cern.ch/record/1091744
work_keys_str_mv AT pozzatie mapsin130nmtriplewellcmostechnologyforhepapplications
AT manghisonim mapsin130nmtriplewellcmostechnologyforhepapplications
AT rattil mapsin130nmtriplewellcmostechnologyforhepapplications
AT rev mapsin130nmtriplewellcmostechnologyforhepapplications
AT spezialiv mapsin130nmtriplewellcmostechnologyforhepapplications
AT traversig mapsin130nmtriplewellcmostechnologyforhepapplications

Ejemplares similares