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Logic synthesis and verification algorithms
| Autor principal: | |
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| Lenguaje: | eng |
| Publicado: |
Springer
1996
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/1137933 |
| _version_ | 1780915466238164992 |
|---|---|
| author | Hachtel, Gary D |
| author_facet | Hachtel, Gary D |
| author_sort | Hachtel, Gary D |
| collection | CERN |
| id | cern-1137933 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 1996 |
| publisher | Springer |
| record_format | invenio |
| spelling | cern-11379332021-04-22T01:43:36Zhttp://cds.cern.ch/record/1137933engHachtel, Gary DLogic synthesis and verification algorithmsEngineeringSpringeroai:cds.cern.ch:11379331996 |
| spellingShingle | Engineering Hachtel, Gary D Logic synthesis and verification algorithms |
| title | Logic synthesis and verification algorithms |
| title_full | Logic synthesis and verification algorithms |
| title_fullStr | Logic synthesis and verification algorithms |
| title_full_unstemmed | Logic synthesis and verification algorithms |
| title_short | Logic synthesis and verification algorithms |
| title_sort | logic synthesis and verification algorithms |
| topic | Engineering |
| url | http://cds.cern.ch/record/1137933 |
| work_keys_str_mv | AT hachtelgaryd logicsynthesisandverificationalgorithms |