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Design Considerations for High Step-Down ratio Buck Regulators
The buck or step-down DC-DC converter is the workhorse switching power supply topology. It utilizes two switches (two FETS or one FET and one diode) along with an output inductor and output capacitor. Whether you look at a large computer server, a personal desktop or a laptop computer, a cell phone...
Autores principales: | , |
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Lenguaje: | eng |
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CERN
2008
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.5170/CERN-2008-008.299 http://cds.cern.ch/record/1158647 |
_version_ | 1780915820989251584 |
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author | Khanna, R Dhawan, S |
author_facet | Khanna, R Dhawan, S |
author_sort | Khanna, R |
collection | CERN |
description | The buck or step-down DC-DC converter is the workhorse switching power supply topology. It utilizes two switches (two FETS or one FET and one diode) along with an output inductor and output capacitor. Whether you look at a large computer server, a personal desktop or a laptop computer, a cell phone or a GPS unit all will contain a buck converter in one form or another. This paper will discuss the synchronous buck topology, design considerations, component selection followed by a small signal model of buck converter. Issues that are important in optimizing the efficiency of the design for example MOSFET selection, the impact that the MOSFET driver plays in improving the efficiency will be examined. The paper will finish by contrasting various control architectures. |
id | cern-1158647 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2008 |
publisher | CERN |
record_format | invenio |
spelling | cern-11586472019-09-30T06:29:59Zdoi:10.5170/CERN-2008-008.299http://cds.cern.ch/record/1158647engKhanna, RDhawan, SDesign Considerations for High Step-Down ratio Buck RegulatorsDetectors and Experimental TechniquesThe buck or step-down DC-DC converter is the workhorse switching power supply topology. It utilizes two switches (two FETS or one FET and one diode) along with an output inductor and output capacitor. Whether you look at a large computer server, a personal desktop or a laptop computer, a cell phone or a GPS unit all will contain a buck converter in one form or another. This paper will discuss the synchronous buck topology, design considerations, component selection followed by a small signal model of buck converter. Issues that are important in optimizing the efficiency of the design for example MOSFET selection, the impact that the MOSFET driver plays in improving the efficiency will be examined. The paper will finish by contrasting various control architectures.CERNoai:cds.cern.ch:11586472008 |
spellingShingle | Detectors and Experimental Techniques Khanna, R Dhawan, S Design Considerations for High Step-Down ratio Buck Regulators |
title | Design Considerations for High Step-Down ratio Buck Regulators |
title_full | Design Considerations for High Step-Down ratio Buck Regulators |
title_fullStr | Design Considerations for High Step-Down ratio Buck Regulators |
title_full_unstemmed | Design Considerations for High Step-Down ratio Buck Regulators |
title_short | Design Considerations for High Step-Down ratio Buck Regulators |
title_sort | design considerations for high step-down ratio buck regulators |
topic | Detectors and Experimental Techniques |
url | https://dx.doi.org/10.5170/CERN-2008-008.299 http://cds.cern.ch/record/1158647 |
work_keys_str_mv | AT khannar designconsiderationsforhighstepdownratiobuckregulators AT dhawans designconsiderationsforhighstepdownratiobuckregulators |