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High-Resolution Time-to-Digital Converter in Field Programmable Gate Array
Two high-resolution time-interval measuring systems implemented in a SRAM-based FPGA device are presented. The two methods ought to be used for time interpolation within the system clock cycle. We designed and built a PCB hosting a Virtex-5 Xilinx FPGA. We exploited high stability oscillators to tes...
| Autores principales: | , , , , , , |
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| Lenguaje: | eng |
| Publicado: |
CERN
2008
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.5170/CERN-2008-008.383 http://cds.cern.ch/record/1158663 |