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Instrumentation for Gate Current Noise Measurements on sub-100 nm MOS Transistors

This work describes a measuring system that was developed to characterize the gate current noise performances of CMOS devices with minimum feature size in the 100 nm span. These devices play an essential role in the design of present daymixedsignal integrated circuits, because of the advantages asso...

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Detalles Bibliográficos
Autores principales:	Gaioni, L, Manghisoni, M, Ratti, L, Re, V, Speziali, V, Traversi, G
Lenguaje:	eng
Publicado:	CERN 2008
Materias:	Detectors and Experimental Techniques
Acceso en línea:	https://dx.doi.org/10.5170/CERN-2008-008.436 http://cds.cern.ch/record/1159533

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