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The LHCb trigger: algorithms and performance

This article describes the hardware architecture of the LHCb trigger system, as well as the algorithms that it executes in order to identify the relevant B meson decays. The expected performance on simulated data and the trigger commissioning status and plans are also presented. The LHCb trigger con...

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Detalles Bibliográficos
Autor principal: Ruiz, Hugo
Lenguaje:eng
Publicado: 2009
Materias:
Acceso en línea:https://dx.doi.org/10.1016/j.nima.2010.03.058
http://cds.cern.ch/record/1174028
Descripción
Sumario:This article describes the hardware architecture of the LHCb trigger system, as well as the algorithms that it executes in order to identify the relevant B meson decays. The expected performance on simulated data and the trigger commissioning status and plans are also presented. The LHCb trigger consists of two phases: the Level 0 and the High Level Trigger. The former is synchronous and implemented in custom electronics, and it reduces the rate to 1 MHz. The High Level Trigger is a C++ algorithm running in a farm of about 1000 16-core computing nodes and further reducing the rate to 2 kHz. The Level 0 efficiency computed on B meson events that would be offline-selected range between 90% for decays containing muons and 50% for purely hadronic decays, the later suffering from higher light quark backgrounds. Overall High Level Trigger efficiencies range between 60 and 80%.