An FPGA-based Emulation of the G-Link chip-set for the ATLAS Level-1 Barrel Muon Trigger

The ATLAS Level-1 Muon trigger is built as a synchronous pipeline and includes some high-speed serial links in order to transfer data from the detector to the counting room. The links are based on the GLink chip-set, which performs transfers data with a fixed latency. Despite this unique timing feature, the production discontinued and no compatible off-the-shelf chip-sets are available. A replacement for the receivers in the counting room in case of failures is needed. We developed a replacement solution for G-Link transmitters and receivers, based on the gigabit serial IO (GTP) embedded in a Xilinx Virtex5-LXT Field Programmable Gate Array (FPGA).