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Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operations

The conceptual design for a Level-1 muon track-finder trigger for the CMS endcap muon system is proposed that can accommodate the increased particle occupancy and system constraints of the proposed SLHC accelerator upgrade and the CMS detector upgrades. A brief review of the architecture of the curr...

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Autores principales: Acosta, D, Fisher, M, Furic, I, Gartner, J, Di Giovanni, G P, Hammar, A, Kotov, K, Madorsky, A, Matveev, M, Padley, P, Uvarov, L, Wang, D
Lenguaje:eng
Publicado: CERN 2009
Materias:
Acceso en línea:https://dx.doi.org/10.5170/CERN-2009-006.254
http://cds.cern.ch/record/1234904
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author Acosta, D
Fisher, M
Furic, I
Gartner, J
Di Giovanni, G P
Hammar, A
Kotov, K
Madorsky, A
Matveev, M
Padley, P
Uvarov, L
Wang, D
author_facet Acosta, D
Fisher, M
Furic, I
Gartner, J
Di Giovanni, G P
Hammar, A
Kotov, K
Madorsky, A
Matveev, M
Padley, P
Uvarov, L
Wang, D
author_sort Acosta, D
collection CERN
description The conceptual design for a Level-1 muon track-finder trigger for the CMS endcap muon system is proposed that can accommodate the increased particle occupancy and system constraints of the proposed SLHC accelerator upgrade and the CMS detector upgrades. A brief review of the architecture of the current track-finder for LHC trigger operation is given, with potential bottlenecks indicated for SLHC operation. The upgraded track-finding processors described here would receive as many as two track segments detected from every cathode strip chamber comprising the endcap muon system, up to a total of 18 per 60° azimuthal sector. This would dramatically improve the efficiency of the track reconstruction in a high occupancy environment over the current design. However, such an improvement would require significantly higher bandwidth and logic resources. We propose to use the fastest available serial links, running asynchronously to the machine clock to use their full bandwidth. The work of creating a firmware model for the upgraded Sector Processor is in progress; details of its implementation will be discussed. Another enhancement critical for the overall Level-1 trigger capability for physics studies in phase 2 of the SLHC is to include the inner silicon tracking systems into the design of the Level-1 trigger.
id cern-1234904
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2009
publisher CERN
record_format invenio
spelling cern-12349042019-09-30T06:29:59Zdoi:10.5170/CERN-2009-006.254http://cds.cern.ch/record/1234904engAcosta, DFisher, MFuric, IGartner, JDi Giovanni, G PHammar, AKotov, KMadorsky, AMatveev, MPadley, PUvarov, LWang, DDesign Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operationsDetectors and Experimental TechniquesThe conceptual design for a Level-1 muon track-finder trigger for the CMS endcap muon system is proposed that can accommodate the increased particle occupancy and system constraints of the proposed SLHC accelerator upgrade and the CMS detector upgrades. A brief review of the architecture of the current track-finder for LHC trigger operation is given, with potential bottlenecks indicated for SLHC operation. The upgraded track-finding processors described here would receive as many as two track segments detected from every cathode strip chamber comprising the endcap muon system, up to a total of 18 per 60° azimuthal sector. This would dramatically improve the efficiency of the track reconstruction in a high occupancy environment over the current design. However, such an improvement would require significantly higher bandwidth and logic resources. We propose to use the fastest available serial links, running asynchronously to the machine clock to use their full bandwidth. The work of creating a firmware model for the upgraded Sector Processor is in progress; details of its implementation will be discussed. Another enhancement critical for the overall Level-1 trigger capability for physics studies in phase 2 of the SLHC is to include the inner silicon tracking systems into the design of the Level-1 trigger.CERNoai:cds.cern.ch:12349042009
spellingShingle Detectors and Experimental Techniques
Acosta, D
Fisher, M
Furic, I
Gartner, J
Di Giovanni, G P
Hammar, A
Kotov, K
Madorsky, A
Matveev, M
Padley, P
Uvarov, L
Wang, D
Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operations
title Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operations
title_full Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operations
title_fullStr Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operations
title_full_unstemmed Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operations
title_short Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operations
title_sort design considerations for an upgraded track-finding processor in the level-1 endcap muon trigger of cms for slhc operations
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.5170/CERN-2009-006.254
http://cds.cern.ch/record/1234904
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