The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09

This paper describes the Analog to Digital Converter developed for the front end electronic of the IN2P3 INNOTEP project by the “pole microelectronique Rhone-Auvergne”. (Collaboration between LPC Clermont-Ferrand and IPNL Lyon). This ADC is a 4 stages 2.5 bits per stage pipe line with open loops track and holds and amplifiers. It runs at 100MSamples/s and has 8 bits resolution. The stages used two lines, the gain line and the comparison line, with most operators running in current. The main idea of this current line is to make a first step toward an all in current structure. Currently, this ADC is designed with a 0,35μm SiGe technology.