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The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09

This paper describes the Analog to Digital Converter developed for the front end electronic of the IN2P3 INNOTEP project by the “pole microelectronique Rhone-Auvergne”. (Collaboration between LPC Clermont-Ferrand and IPNL Lyon). This ADC is a 4 stages 2.5 bits per stage pipe line with open loops tra...

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Detalles Bibliográficos
Autores principales: Crampon, S, Bohner, G, Chanal, H, Lecoq, J, Mathez, H, Vert, P E
Lenguaje:eng
Publicado: CERN 2009
Materias:
Acceso en línea:https://dx.doi.org/10.5170/CERN-2009-006.313
http://cds.cern.ch/record/1235830
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author Crampon, S
Bohner, G
Chanal, H
Lecoq, J
Mathez, H
Vert, P E
author_facet Crampon, S
Bohner, G
Chanal, H
Lecoq, J
Mathez, H
Vert, P E
author_sort Crampon, S
collection CERN
description This paper describes the Analog to Digital Converter developed for the front end electronic of the IN2P3 INNOTEP project by the “pole microelectronique Rhone-Auvergne”. (Collaboration between LPC Clermont-Ferrand and IPNL Lyon). This ADC is a 4 stages 2.5 bits per stage pipe line with open loops track and holds and amplifiers. It runs at 100MSamples/s and has 8 bits resolution. The stages used two lines, the gain line and the comparison line, with most operators running in current. The main idea of this current line is to make a first step toward an all in current structure. Currently, this ADC is designed with a 0,35μm SiGe technology.
id cern-1235830
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2009
publisher CERN
record_format invenio
spelling cern-12358302019-09-30T06:29:59Zdoi:10.5170/CERN-2009-006.313http://cds.cern.ch/record/1235830engCrampon, SBohner, GChanal, HLecoq, JMathez, HVert, P EThe 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09Detectors and Experimental TechniquesThis paper describes the Analog to Digital Converter developed for the front end electronic of the IN2P3 INNOTEP project by the “pole microelectronique Rhone-Auvergne”. (Collaboration between LPC Clermont-Ferrand and IPNL Lyon). This ADC is a 4 stages 2.5 bits per stage pipe line with open loops track and holds and amplifiers. It runs at 100MSamples/s and has 8 bits resolution. The stages used two lines, the gain line and the comparison line, with most operators running in current. The main idea of this current line is to make a first step toward an all in current structure. Currently, this ADC is designed with a 0,35μm SiGe technology.CERNoai:cds.cern.ch:12358302009
spellingShingle Detectors and Experimental Techniques
Crampon, S
Bohner, G
Chanal, H
Lecoq, J
Mathez, H
Vert, P E
The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09
title The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09
title_full The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09
title_fullStr The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09
title_full_unstemmed The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09
title_short The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09
title_sort 8 bits 100 ms/s pipeline adc for the innotep project – twepp-09
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.5170/CERN-2009-006.313
http://cds.cern.ch/record/1235830
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