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Design and measurements of 10 bit pipeline ADC for the Luminosity Detector at ILC
The design and the preliminary measurements of a prototype 10 bit pipeline ADC based on 1.5-bit per stage architecture, developed for the luminosity detector at International Linear Collider (ILC) are presented. The ADC is designed in two versions, with and without a sample-and-hold circuit (S/H) at...
| Autores principales: | , , |
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| Lenguaje: | eng |
| Publicado: |
CERN
2009
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.5170/CERN-2009-006.448 http://cds.cern.ch/record/1235855 |