Development of A 16:1 serializer for data transmission at 5 Gbps

Radiation tolerant, high speed and low power serializer ASIC is critical for optical link systems in particle physics experiments. Based on a commercial 0.25 μm silicon-onsapphire CMOS technology, we design a 16:1 serializer with 5 Gbps serial data rate. This ASIC has been submitted for fabrication....

Descripción completa

Detalles Bibliográficos
Autores principales: Gong, Datao, Hou, Suen, Liang, Zhihua, Liu, Chonghan, Liu, Tiankuan, Da-Shun Su, Teng, Ping-Kun, Xiang, Annie C, Ye, Jingbo
Lenguaje:eng
Publicado: CERN 2009
Materias:
Engineering
Acceso en línea:https://dx.doi.org/10.5170/CERN-2009-006.481
http://cds.cern.ch/record/1235868
_version_ 1780918560095207424
author Gong, Datao
Hou, Suen
Liang, Zhihua
Liu, Chonghan
Liu, Tiankuan
Da-Shun Su,
Teng, Ping-Kun
Xiang, Annie C
Ye, Jingbo
author_facet Gong, Datao
Hou, Suen
Liang, Zhihua
Liu, Chonghan
Liu, Tiankuan
Da-Shun Su,
Teng, Ping-Kun
Xiang, Annie C
Ye, Jingbo
author_sort Gong, Datao
collection CERN
description Radiation tolerant, high speed and low power serializer ASIC is critical for optical link systems in particle physics experiments. Based on a commercial 0.25 μm silicon-onsapphire CMOS technology, we design a 16:1 serializer with 5 Gbps serial data rate. This ASIC has been submitted for fabrication. The post-layout simulation indicates the deterministic jitter is 54 ps (pk-pk) and random jitter is 3 ps (rms). The power consumption of the serializer is 500 mW. The design details and post layout simulation results are presented in this paper.
id cern-1235868
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2009
publisher CERN
record_format invenio
spelling cern-12358682019-09-30T06:29:59Zdoi:10.5170/CERN-2009-006.481http://cds.cern.ch/record/1235868engGong, DataoHou, SuenLiang, ZhihuaLiu, ChonghanLiu, TiankuanDa-Shun Su,Teng, Ping-KunXiang, Annie CYe, JingboDevelopment of A 16:1 serializer for data transmission at 5 GbpsEngineeringRadiation tolerant, high speed and low power serializer ASIC is critical for optical link systems in particle physics experiments. Based on a commercial 0.25 μm silicon-onsapphire CMOS technology, we design a 16:1 serializer with 5 Gbps serial data rate. This ASIC has been submitted for fabrication. The post-layout simulation indicates the deterministic jitter is 54 ps (pk-pk) and random jitter is 3 ps (rms). The power consumption of the serializer is 500 mW. The design details and post layout simulation results are presented in this paper.CERNoai:cds.cern.ch:12358682009
spellingShingle Engineering
Gong, Datao
Hou, Suen
Liang, Zhihua
Liu, Chonghan
Liu, Tiankuan
Da-Shun Su,
Teng, Ping-Kun
Xiang, Annie C
Ye, Jingbo
Development of A 16:1 serializer for data transmission at 5 Gbps
title Development of A 16:1 serializer for data transmission at 5 Gbps
title_full Development of A 16:1 serializer for data transmission at 5 Gbps
title_fullStr Development of A 16:1 serializer for data transmission at 5 Gbps
title_full_unstemmed Development of A 16:1 serializer for data transmission at 5 Gbps
title_short Development of A 16:1 serializer for data transmission at 5 Gbps
title_sort development of a 16:1 serializer for data transmission at 5 gbps
topic Engineering
url https://dx.doi.org/10.5170/CERN-2009-006.481
http://cds.cern.ch/record/1235868
work_keys_str_mv AT gongdatao developmentofa161serializerfordatatransmissionat5gbps
AT housuen developmentofa161serializerfordatatransmissionat5gbps
AT liangzhihua developmentofa161serializerfordatatransmissionat5gbps
AT liuchonghan developmentofa161serializerfordatatransmissionat5gbps
AT liutiankuan developmentofa161serializerfordatatransmissionat5gbps
AT dashunsu developmentofa161serializerfordatatransmissionat5gbps
AT tengpingkun developmentofa161serializerfordatatransmissionat5gbps
AT xianganniec developmentofa161serializerfordatatransmissionat5gbps
AT yejingbo developmentofa161serializerfordatatransmissionat5gbps

Ejemplares similares