Cargando…

Network processors: architecture, programming, and implementation

Detalles Bibliográficos
Autor principal:	Giladi, Ran
Lenguaje:	eng
Publicado:	Elsevier 2008
Materias:	Engineering
Acceso en línea:	http://cds.cern.ch/record/1252625

Ejemplares similares

DSP processor fundamentals: architectures and features
por: Lapsley, Phil
Publicado: (1997)

Heterogeneous reconfigurable processors for real-time baseband processing: from algorithm to architecture
por: Zhang, Chenxin, et al.
Publicado: (2016)

Energy-efficient communication processors: design and implementation for emerging wireless systems
por: Fasthuber, Robert, et al.
Publicado: (2013)

Network processors: architectures, protocols, and platforms
por: Lekkas, Panos C
Publicado: (2003)

VLSI array processors
por: Kung, Sun Yuan
Publicado: (1988)

Digital signal computers and processors
por: Salazar, Andres C
Publicado: (1977)

Invasive tightly coupled processor arrays
por: LARI, VAHID
Publicado: (2016)

Ascend AI processor architecture and programming: principles and applications of CANN
por: Liang, Xiaoyao
Publicado: (2020)

Digital systems: from logic gates to processors
por: Deschamps, Jean-Pierre, et al.
Publicado: (2017)

Customizable Embedded Processors: Design Technologies and Applications
por: Ienne, Paolo
Publicado: (2006)

Heterogeneous Multicore Processor Technologies for Embedded Systems
por: Uchiyama, Kunio, et al.
Publicado: (2012)

Pentium processor system architecture
por: Anderson, Don, et al.
Publicado: (1995)

Pentium processor system architecture /
por: Anderson, Don, 1953-
Publicado: (1995)

Digital Processors: Methods in Hardware and Software System Design
por: Mayer-Lindenberg, F
Publicado: (2004)

Advanced FPGA design: architecture, implementation, and optimization
por: Kilts, Steve
Publicado: (2007)

Principles of secure processor architecture design
por: Szefer, Jakub, et al.
Publicado: (2018)

General-purpose graphics processor architecture
por: Aamodt, Tor M, et al.
Publicado: (2018)

ISDN: the complete guide to ISDN architecture, products, and implementation
por: Goralski, Walter J, et al.
Publicado: (1996)

InfiniBand network architecture
por: Shanley, Tom, et al.
Publicado: (2003)

Hybrid fault tolerance techniques to detect transient faults in embedded processors
por: Azambuja, José Rodrigo, et al.
Publicado: (2014)

Embedded SoPC Design with Nios II Processor and Verilog Examples
por: Chu, Pong P
Publicado: (2012)

ATLAS Central Trigger Processor Input Module (CTPIN) Firmware Upgrade
por: Fountas, Petros
Publicado: (2013)

Embedded SoPC design with NIOS II processor and VHDL examples
por: Chu, Pong P
Publicado: (2011)

Pixel detector bias supply and control using embedded multicore processors
por: Vadai, Mihaly
Publicado: (2018)

Digital MOS integrated circuits 2: with applications to processors and memory design
por: Elmasry, Mohamed I
Publicado: (1992)

Experimentation with the Embedded Monitoring Processor of the ATLAS DCS EMCI-EMP Interface
por: Gkotsis, Panagiotis
Publicado: (2022)

Optimal Architecture of Floating-Point Arithmetic for Neural Network Training Processors
por: Junaid, Muhammad, et al.
Publicado: (2022)

Sustainable wireless network-on-chip architectures
por: Murray, Jacob, et al.
Publicado: (2016)

An alternative architecture of the L0(æ) processor
por: Aslanides, Elie, et al.
Publicado: (1997)

Directions in parallel processor architecture, and GPUs too
por: Giroux, Olivier
Publicado: (2014)

Design of Convolutional Neural Network Processor Based on FPGA Resource Multiplexing Architecture
por: Yan, Fei, et al.
Publicado: (2022)

Architectural transformations in network services and distributed systems
por: Luntovskyy, Andriy, et al.
Publicado: (2017)

Advances in network systems: architectures, security, and applications
por: Grzenda, Maciej, et al.
Publicado: (2017)

Elastic optical networks: architectures, technologies, and control
por: López, Víctor, et al.
Publicado: (2016)

Real-time recursive hyperspectral sample and band processing: algorithm architecture and implementation
por: Chang, Chein-I
Publicado: (2017)

Implementation of monitors with macros: a programming aid for the HEP and other parallel processors
por: Lusk, E L, et al.
Publicado: (1984)

Modeling, analysis and optimization of network-on-chip communication architectures
por: Ogras, Umit Y, et al.
Publicado: (2013)

High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation
por: Palchaudhuri, Ayan, et al.
Publicado: (2016)

Engineering an Optimized Instruction Set Architecture for AMIDAR Processors
por: Schwarz, Alexander, et al.
Publicado: (2020)

5G NR: architecture, technology, implementation, and operation of 3GPP new radio standards
por: Ahmadi, Sassan
Publicado: (2019)

Cannot write session to /tmp/vufind_sessions/sess_k3spltaa7u3kfbp14jefe7scfi