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Study of Acquisition Electronics with a High Dynamic Range for a Beam Loss Measurement System
The particles accelerated in CERN accelerator chain reach high energies, topped by the particle energy at collision in the LHC, 7 GeV. During the operation, an amount of particles is inevitably lost from the beam. Depending on the extent of the losses, physical damage to machine components may be ca...
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Lenguaje: | eng |
Publicado: |
Politecnico
2010
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/1271709 |
Sumario: | The particles accelerated in CERN accelerator chain reach high energies, topped by the particle energy at collision in the LHC, 7 GeV. During the operation, an amount of particles is inevitably lost from the beam. Depending on the extent of the losses, physical damage to machine components may be caused and the shower of secondary emission particles deposits energy in the surrounding equipment constituting the accelerator. The hadronic cascade also activates their materials, representing a hazard to the workers at CERN. In the LHC, the superconducting magnets that constitute the synchrotron lattice are kept at an operating temperature of 1:9K through a cryogenic facility employing superliquid helium, the increase in their temperature potentially initiates a quench. In the SPS, the damage due to a lost beam is also visible. The Beam Loss Monitoring (BLM) system has been developed to reliably protect the machines composing CERN’s accelerator chain and additionally provide information about the beam status: the system provides observations about local aperture restrictions, orbit distortion, beam oscillations and particle diffusion, allowing the operators to tune the machines, measure and maximize the efficiency of the chain. To achieve this, two types of particles detectors are distributed along the machines in the positions where the most intense losses are expected, typically where aperture limitations are present – for exa mple where the collimators are located. The main type of detector in use is the ionization chamber, albeit where a very high dose rate is expected Secondary Emission Monitor (SEM) are employed instead. Both types of detectors are sensitive to the hardronic showers initiated by high energy particles and they are characterized by high linearity and accuracy with respect to the energy lost by the particles, a fast responses and good radiation tolerance. Where timely machine protection is in place, for every detector location the fraction of particles from the hardronic showers has been linked to the energy distribution within the coil through simulation-based analysis and maximum allowable energy value has been established. The signal from the detector is acquired by the front-end electronics and, where applicable, the measurement is compared with the threshold relevant for the considered ring location. As the dimensions of the accelerators varies greatly, the signal might be acquired, digitized in the accelerator tunnel and then sent to the surface electronics to be processed – as it happens in the LHC – or the complete processing may occur in a shielded facility closely located. In the former case, radiation tolerant electronics is required. In the LHC, when a threshold is exceeded, the beam permit signal is revoked and the circulating particles are directed towards the dump line. In machines employing warm magnets – such as the PS Booster – the beam parameters are tuned before the next injection, to increase the quality of the beam. A discrete components design of a current digitizer based on the current-to-frequency converter (CFC) principle has been studied in this work. The design targets at rather high input current compared to similar acquisition systems, with a maximum equal to 100mA and a minimum of 1 nA, as required by the ionization chamber that will be employed in the Proton Synchrotron and Booster accelerators as well as in the LINAC 4. It allows the integral acquisition of currents of both polarities without requiring any configuration and provides a digital number having an LSB equal to a reference charge complemented with an additional fractional count through an ADC, to increase the resolution. Several architectural choices we considered for the front-end circuit, including charge balance integrators, dual-integrator input stages, integrators with switchable-capacitor, in both synchronous and asynchronous versions. The signal is processed by an FPGA and transmitted over a VME64x bus. |
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