ATLAS IBL: Integration of new HW/SW readout features for the additional layer of Pixel Detector

An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design. The front-end electronics features a new readout ASIC, named FeI4, which requires new off-detector electronics, currently realized with two VME-based boards, which implement optical I/O...

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Detalles Bibliográficos
Autores principales: Bruni, G, Bruschi, M, D’Antone, I, Dopke, J, Falchieri, D, Flick, T, Gabrielli, A, Gross-Kettner, J, Joseph, J, Krieger, N, Kugel, A, Morettini, P, Polini, A, Rizzi, M, Schroer, N C, Travaglini, R, Zannoli, S, Zoccoli, A
Lenguaje:eng
Publicado: 2010
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/6/01/C01018
http://cds.cern.ch/record/1301775
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author Bruni, G
Bruschi, M
D’Antone, I
Dopke, J
Falchieri, D
Flick, T
Gabrielli, A
Gross-Kettner, J
Joseph, J
Krieger, N
Kugel, A
Morettini, P
Polini, A
Rizzi, M
Schroer, N C
Travaglini, R
Zannoli, S
Zoccoli, A
author_facet Bruni, G
Bruschi, M
D’Antone, I
Dopke, J
Falchieri, D
Flick, T
Gabrielli, A
Gross-Kettner, J
Joseph, J
Krieger, N
Kugel, A
Morettini, P
Polini, A
Rizzi, M
Schroer, N C
Travaglini, R
Zannoli, S
Zoccoli, A
author_sort Bruni, G
collection CERN
description An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design. The front-end electronics features a new readout ASIC, named FeI4, which requires new off-detector electronics, currently realized with two VME-based boards, which implement optical I/O functionality (BOC card) and data processing functionality (ROD card), plus a timing interface module (TIM). This paper presents a proposal for the IBL readout system, mainly focusing on the ROD board.
id cern-1301775
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2010
record_format invenio
spelling cern-13017752019-09-30T06:29:59Zdoi:10.1088/1748-0221/6/01/C01018http://cds.cern.ch/record/1301775engBruni, GBruschi, MD’Antone, IDopke, JFalchieri, DFlick, TGabrielli, AGross-Kettner, JJoseph, JKrieger, NKugel, AMorettini, PPolini, ARizzi, MSchroer, N CTravaglini, RZannoli, SZoccoli, AATLAS IBL: Integration of new HW/SW readout features for the additional layer of Pixel DetectorDetectors and Experimental TechniquesAn additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design. The front-end electronics features a new readout ASIC, named FeI4, which requires new off-detector electronics, currently realized with two VME-based boards, which implement optical I/O functionality (BOC card) and data processing functionality (ROD card), plus a timing interface module (TIM). This paper presents a proposal for the IBL readout system, mainly focusing on the ROD board.ATL-INDET-PROC-2010-032oai:cds.cern.ch:13017752010-10-22
spellingShingle Detectors and Experimental Techniques
Bruni, G
Bruschi, M
D’Antone, I
Dopke, J
Falchieri, D
Flick, T
Gabrielli, A
Gross-Kettner, J
Joseph, J
Krieger, N
Kugel, A
Morettini, P
Polini, A
Rizzi, M
Schroer, N C
Travaglini, R
Zannoli, S
Zoccoli, A
ATLAS IBL: Integration of new HW/SW readout features for the additional layer of Pixel Detector
title ATLAS IBL: Integration of new HW/SW readout features for the additional layer of Pixel Detector
title_full ATLAS IBL: Integration of new HW/SW readout features for the additional layer of Pixel Detector
title_fullStr ATLAS IBL: Integration of new HW/SW readout features for the additional layer of Pixel Detector
title_full_unstemmed ATLAS IBL: Integration of new HW/SW readout features for the additional layer of Pixel Detector
title_short ATLAS IBL: Integration of new HW/SW readout features for the additional layer of Pixel Detector
title_sort atlas ibl: integration of new hw/sw readout features for the additional layer of pixel detector
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.1088/1748-0221/6/01/C01018
http://cds.cern.ch/record/1301775
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