Towards Energy-Centric Computing and Computer Architecture

<!--HTML--><p align="justify">Technology forecasts indicate that device scaling will continue well into the next decade.&nbsp; Unfortunately, it is becoming extremely difficult to harness this increase in the number of transistors&nbsp;into performance due to a number of technological, circuit, architectural, methodological and&nbsp; programming challenges.</p><p align="justify">In this talk, I will argue that the key emerging showstopper is power.&nbsp; Voltage scaling as a means to maintain a constant power envelope with an increase in transistor&nbsp; numbers is hitting diminishing returns. As such, to continue riding the Moore's law we need to look&nbsp; for drastic measures to cut power. This is definitely the case for server chips in future datacenters,&nbsp;where abundant server parallelism, redundancy and 3D chip integration are likely to remove&nbsp; programming, reliability and bandwidth hurdles, leaving power as the only true limiter.</p><p align="justify">I will present&nbsp; results backing this argument based on validated models for future server chips and parameters&nbsp; extracted from real commercial workloads. Then I use these results to project future research&nbsp; directions for datacenter hardware and software.</p><h4>About the speaker</h4><p align="justify">Babak Falsafi is a Professor in the School of Computer and Communication Sciences at EPFL, and an&nbsp; Adjunct Professor of Electrical and Computer Engineering and Computer Science at Carnegie Mellon.&nbsp; He is the&nbsp;founder and the director of&nbsp;&nbsp;the Parallel Systems Architecture Laboratory (PARSA) at EPFL where he conducts research on&nbsp;architectural support for parallel programming, resilient systems, architectures to break the memory&nbsp; wall, and analytic and simulation tools for computer system performance evaluation.</p><p align="justify">In 1999, in&nbsp; collaboration with T. N. Vijaykumar he showed for the first time that, contrary to conventional wisdom,&nbsp;multiprocessors do not need&nbsp;relaxed memory consistency models (and the resulting convoluted programming interfaces found and used in modern systems) to achieve high performance. He is a recipient of an NSF CAREER&nbsp; award in 2000, IBM Faculty Partnership Awards between 2001 and 2004, and an Alfred P. Sloan&nbsp; Research Fellowship in 2004. He is a senior member of IEEE and ACM.&nbsp;</p>