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Design of eight-channel ADC card for GHz signal conversion
This paper describes the design of an eight-channel ATCA card suited for direct analog-to-digital conversion of 1.3 GHz signals with a maximum ADC clock frequency of 500 MHz. The undersampling operation is used for signal conversion. This card was designed for the needs of the LLRF system of the FLA...
Autores principales: | , , , |
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Formato: | info:eu-repo/semantics/article |
Lenguaje: | eng |
Publicado: |
2011
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/1349290 |
Sumario: | This paper describes the design of an eight-channel ATCA card suited for direct analog-to-digital conversion of 1.3 GHz signals with a maximum ADC clock frequency of 500 MHz. The undersampling operation is used for signal conversion. This card was designed for the needs of the LLRF system of the FLASH and XFEL accelerators. The designed module consists of a main ATCA board with eight ADCs, FPGA unit, memory, power supply and diagnostic circuits. The main ATCA card allows connecting a daughter board with IPMI, CPU and fast interfaces for communication purposes. This paper describes such issues as system organization allowing acquisition of data at such high data rates, circuit synchronization by high-quality clock signals, CPU and connectivity features, 20-layer PCB design and techniques used for high-frequency signals transmission and matching. |
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