Fully on-chip switched capacitor NMOS low dropout voltage regulator

This paper presents a 1.5 V 50 mA low dropout voltage (LDO) regulator using an NMOS transistor as the output pass element. Continuous time,operation of the LDO is achieved using a new switched floating capacitor scheme that raises the gate voltage of the pass element. The regulator has a 0.2 V dropo...

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Detalles Bibliográficos
Autores principales: Camacho, D, Gui, Ping, Camacho, Daniel, Moreira, Paulo
Lenguaje:eng
Publicado: 2010
Materias:
Information Transfer and Management
Acceso en línea:https://dx.doi.org/10.1007/s10470-009-9439-y
http://cds.cern.ch/record/1359314
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author Camacho, D
Gui, Ping
Camacho, Daniel
Moreira, Paulo
author_facet Camacho, D
Gui, Ping
Camacho, Daniel
Moreira, Paulo
author_sort Camacho, D
collection CERN
description This paper presents a 1.5 V 50 mA low dropout voltage (LDO) regulator using an NMOS transistor as the output pass element. Continuous time,operation of the LDO is achieved using a new switched floating capacitor scheme that raises the gate voltage of the pass element. The regulator has a 0.2 V dropout at a 50 mA load and is stable for a wide load current range with loading capacitances up to 50 pF. The output variation when a full load step is applied is 300 mV and the recovery time is below 0.3 mu s. it is designed in a 0.13 mu m CMOS process with an area of 0.008 mm(2) and its operation does not require any external component.
id cern-1359314
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2010
record_format invenio
spelling cern-13593142019-09-30T06:29:59Zdoi:10.1007/s10470-009-9439-yhttp://cds.cern.ch/record/1359314engCamacho, DGui, PingCamacho, DanielMoreira, PauloFully on-chip switched capacitor NMOS low dropout voltage regulatorInformation Transfer and ManagementThis paper presents a 1.5 V 50 mA low dropout voltage (LDO) regulator using an NMOS transistor as the output pass element. Continuous time,operation of the LDO is achieved using a new switched floating capacitor scheme that raises the gate voltage of the pass element. The regulator has a 0.2 V dropout at a 50 mA load and is stable for a wide load current range with loading capacitances up to 50 pF. The output variation when a full load step is applied is 300 mV and the recovery time is below 0.3 mu s. it is designed in a 0.13 mu m CMOS process with an area of 0.008 mm(2) and its operation does not require any external component.oai:cds.cern.ch:13593142010
spellingShingle Information Transfer and Management
Camacho, D
Gui, Ping
Camacho, Daniel
Moreira, Paulo
Fully on-chip switched capacitor NMOS low dropout voltage regulator
title Fully on-chip switched capacitor NMOS low dropout voltage regulator
title_full Fully on-chip switched capacitor NMOS low dropout voltage regulator
title_fullStr Fully on-chip switched capacitor NMOS low dropout voltage regulator
title_full_unstemmed Fully on-chip switched capacitor NMOS low dropout voltage regulator
title_short Fully on-chip switched capacitor NMOS low dropout voltage regulator
title_sort fully on-chip switched capacitor nmos low dropout voltage regulator
topic Information Transfer and Management
url https://dx.doi.org/10.1007/s10470-009-9439-y
http://cds.cern.ch/record/1359314
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AT camachodaniel fullyonchipswitchedcapacitornmoslowdropoutvoltageregulator
AT moreirapaulo fullyonchipswitchedcapacitornmoslowdropoutvoltageregulator

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