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Characterization of new hybrid pixel module concepts for the ATLAS Insertable B-Layer upgrade

For the ATLAS pixel detector, a fourth hybrid pixel detector layer known as Insertable B-Layer (IBL) is developed, which will be slid into the present pixel detector. Due to the very small distance to the interaction point of about 3.4 cm, the IBL will improve the track reconstruction and vertexing...

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Detalles Bibliográficos
Autor principal: Backhaus, M
Lenguaje:eng
Publicado: 2011
Materias:
Acceso en línea:http://cds.cern.ch/record/1390470
Descripción
Sumario:For the ATLAS pixel detector, a fourth hybrid pixel detector layer known as Insertable B-Layer (IBL) is developed, which will be slid into the present pixel detector. Due to the very small distance to the interaction point of about 3.4 cm, the IBL will improve the track reconstruction and vertexing of the pixel detector. In order to handle the extreme particle flux and radiation damage close to the interaction point, new sensor concepts as well as a new readout chip, FE-I4, are currently developed. To reduce the pixel occupancy, the pixel size in FE-I4 is reduced from the 50 x 400 µm² of the readout chip of the current ATLAS pixel detector (FE-I3) to 50 x 250 µm². The FE-I4 active area will cover ~ 2 x 1.7 cm², resulting in 26.880, a nearly ten fold increase in pixel number with respect to FE-I3. This translates into an increased active over inactive area ratio of less than 75% in FE-I3 to 90% in FE-I4. This enables a better, more integrated module concept, with a smaller amount of periphery to achieve a good material budget for IBL, while simplifying the mechanical placement of the modules. FE-I4 was designed to fit the requirements of various new, radiation hard sensor concepts using planar silicon, 3D silicon or diamond sensor technologies that are currently evaluated. These sensor prototypes are available for the new readout chip generation FE-I4 and characterization of all the eligible module concepts in laboratory and test beam environment is ongoing, in order to achieve a fair comparison. A detailed introduction to the FE-4 architecture and results from bare IC testing will be provided. Focus will be brought on the operation and test results of the unirradiated and irradiated modules.