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The rise of HPC accelerators: towards a common vision for a petascale future

<!--HTML--><p align="justify"> Nowadays new exciting scientific discoveries are mainly driven by large challenging simulations. An analysis of the trends in High Performance Computing clearly show that we hit several barriers (CPU frequency, power consumption, technological li...

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Autor principal: Spiga, Filippo
Lenguaje:eng
Publicado: 2011
Materias:
Acceso en línea:http://cds.cern.ch/record/1396194
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author Spiga, Filippo
author_facet Spiga, Filippo
author_sort Spiga, Filippo
collection CERN
description <!--HTML--><p align="justify"> Nowadays new exciting scientific discoveries are mainly driven by large challenging simulations. An analysis of the trends in High Performance Computing clearly show that we hit several barriers (CPU frequency, power consumption, technological limits, limitations of the present paradigms) that we cannot easily overcome. In this context, accelerators became the concrete alternative to increase the compute capabilities of the deployed HPC clusters inside Universities and research centers across Europe. Within the EC funded &quot;<a href="http://www.prace-ri.eu/" target="_blank">Partnership of Advanced Computing in Europe&quot; (PRACE)</a> project, several actions has been taken and will be taken to enable community codes to exploit accelerators in modern HPC architectures. In this talk, the vision and the strategy adopted by the PRACE project will be presented, focusing on new HPC programming model and paradigm. Accelerators are a fundamental piece to innovate in this direction, from both the hardware and the software point of view. This work started during the PRACE Preparatory Phase (2008-2010) and has been carried on during the PRACE First Implementation Phase (1IP, 2010-2012).</p> <h4> About ICHEC</h4> <p align="justify"> The <a href="http://www.ichec.ie" target="_blank">Irish Centre for High-end Computing (ICHEC)</a> leads the Sub-Task &quot;Accelerator&quot; within the Task &quot;Programming Techniques for High Performance Applications&quot; inside the Work Package &quot;Enabling Petascale Applications: Efficient use of Tier-0 systems&quot;. The main porting activities performed until now concern the adoption of GP-GPU technologies (mainly NVIDIA&reg; CUDA) in real applications. ICHEC is directly involved in the porting of Quantum ESPRESSO and EC-EARTH/IFS, a material science and a weather forecast code. We expect in the Second Implementation Phase (2IP, 2011-2013) to explore and assess the adoption of OpenCL to target a wide portfolio of accelerators like ATI&reg; GPU, AMD&reg; APU or Intel&reg; Many Integrated Core Architecture. Portability, reliability and maintenance of future codes will be fundamental aspects to evaluate and adopt new hardware.</p> <hr /> <p align="justify"> <em><b>Notice:</b> This presentation contains personal opinions, forecasts and forward-looking statements of the authors and not necessarily the opinions of any other person or organization mentioned. For official communications and disclosures please refer to <a href="http://www.prace-project.eu" target="_blank">PRACE</a> or <a href="http://www.ichec.ie" target="_blank">ICHEC</a> websites</em>.</p>
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spelling cern-13961942022-11-02T22:30:17Zhttp://cds.cern.ch/record/1396194engSpiga, FilippoThe rise of HPC accelerators: towards a common vision for a petascale futureThe rise of HPC accelerators: towards a common vision for a petascale futureComputing Seminar<!--HTML--><p align="justify"> Nowadays new exciting scientific discoveries are mainly driven by large challenging simulations. An analysis of the trends in High Performance Computing clearly show that we hit several barriers (CPU frequency, power consumption, technological limits, limitations of the present paradigms) that we cannot easily overcome. In this context, accelerators became the concrete alternative to increase the compute capabilities of the deployed HPC clusters inside Universities and research centers across Europe. Within the EC funded &quot;<a href="http://www.prace-ri.eu/" target="_blank">Partnership of Advanced Computing in Europe&quot; (PRACE)</a> project, several actions has been taken and will be taken to enable community codes to exploit accelerators in modern HPC architectures. In this talk, the vision and the strategy adopted by the PRACE project will be presented, focusing on new HPC programming model and paradigm. Accelerators are a fundamental piece to innovate in this direction, from both the hardware and the software point of view. This work started during the PRACE Preparatory Phase (2008-2010) and has been carried on during the PRACE First Implementation Phase (1IP, 2010-2012).</p> <h4> About ICHEC</h4> <p align="justify"> The <a href="http://www.ichec.ie" target="_blank">Irish Centre for High-end Computing (ICHEC)</a> leads the Sub-Task &quot;Accelerator&quot; within the Task &quot;Programming Techniques for High Performance Applications&quot; inside the Work Package &quot;Enabling Petascale Applications: Efficient use of Tier-0 systems&quot;. The main porting activities performed until now concern the adoption of GP-GPU technologies (mainly NVIDIA&reg; CUDA) in real applications. ICHEC is directly involved in the porting of Quantum ESPRESSO and EC-EARTH/IFS, a material science and a weather forecast code. We expect in the Second Implementation Phase (2IP, 2011-2013) to explore and assess the adoption of OpenCL to target a wide portfolio of accelerators like ATI&reg; GPU, AMD&reg; APU or Intel&reg; Many Integrated Core Architecture. Portability, reliability and maintenance of future codes will be fundamental aspects to evaluate and adopt new hardware.</p> <hr /> <p align="justify"> <em><b>Notice:</b> This presentation contains personal opinions, forecasts and forward-looking statements of the authors and not necessarily the opinions of any other person or organization mentioned. For official communications and disclosures please refer to <a href="http://www.prace-project.eu" target="_blank">PRACE</a> or <a href="http://www.ichec.ie" target="_blank">ICHEC</a> websites</em>.</p> oai:cds.cern.ch:13961942011
spellingShingle Computing Seminar
Spiga, Filippo
The rise of HPC accelerators: towards a common vision for a petascale future
title The rise of HPC accelerators: towards a common vision for a petascale future
title_full The rise of HPC accelerators: towards a common vision for a petascale future
title_fullStr The rise of HPC accelerators: towards a common vision for a petascale future
title_full_unstemmed The rise of HPC accelerators: towards a common vision for a petascale future
title_short The rise of HPC accelerators: towards a common vision for a petascale future
title_sort rise of hpc accelerators: towards a common vision for a petascale future
topic Computing Seminar
url http://cds.cern.ch/record/1396194
work_keys_str_mv AT spigafilippo theriseofhpcacceleratorstowardsacommonvisionforapetascalefuture
AT spigafilippo riseofhpcacceleratorstowardsacommonvisionforapetascalefuture