Associative Memory Design for the FastTrack Processor (FTK) at ATLAS

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We propose a new generation of VLSI processor for pattern recognition based on Associative Memory architecture, optimized for on-line track finding in high-energy physics experiments. We describe the architecture, the technology studies and the prototype design of a new Associative Memory project: i...

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Detalles Bibliográficos
Autores principales: Annovi, A, Beretta, M, Volpi, G, Beccherle, R, Bossini, E, Crescioli, F, Dell'Orso, M, Giannetti, P, Amerio, S, Hoff, J, Liu, T, Sacco, I, Liberali, V, Stabile, A, Schoening, A, Soltveit, H, Tripiccione, R
Lenguaje:eng
Publicado: 2011
Materias:
Detectors and Experimental Techniques
Acceso en línea:http://cds.cern.ch/record/1402465
Descripción
Sumario:We propose a new generation of VLSI processor for pattern recognition based on Associative Memory architecture, optimized for on-line track finding in high-energy physics experiments. We describe the architecture, the technology studies and the prototype design of a new Associative Memory project: it maximizes the pattern density on ASICs, minimizes the power consumption and improves the functionality for the fast tracker processor proposed to upgrade the ATLAS trigger at LHC. Finally we will focus on possible future applications inside and outside high physics energy.

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