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The FE-I4 Pixel Readout Chip and the IBL Module

FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus s...

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Detalles Bibliográficos
Autores principales: Barbero, Marlon, Arutinov, David, Backhaus, Malte, Fang, Xiaochao, Gonella, Laura, Hemperek, Tomasz, Karagounis, Michael, Krueger, Hans, Kruth, Andre, Wermes, Norbert, Breugnon, Patrick, Fougeron, Denis, Gensolen, Fabrice, Menouni, Mohsine, Rozanov, Sasha, Caminada, Lea, Dube, Sourabh, Fleury, Julien, Gnani, Dario, Garcia-Sciveres, Maurice, Jensen, Frank, Lu, Yunpeng, Mekkaoui, Abderrezak, Gromov, Vladimir, Kluit, Ruud, Schipper, Jan David, Zivkovic, Vladimir, Grosse-Knetter, Joern, Weingarten, Kocian, Martin
Formato: info:eu-repo/semantics/article
Lenguaje:eng
Publicado: Proceedings of Science 2011
Materias:
Acceso en línea:http://cds.cern.ch/record/1405045
Descripción
Sumario:FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the “Insertable B-Layer” project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.