System-level Specifications of the Timing and Fast Control system for the LHCb Upgrade

The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times the initial design luminosity. The various sub-systems in the readout architecture will need to be upgraded in order to cope with higher sub-detector occupancies, higher rate and higher network load. In this paper, we describe the specifications of the new Timing and Fast Control (S- TFC) system. We define the requirements for the new S-TFC, and specify its architecture and the individual components. The system is based on a single new Readout Supervisor (S-ODIN) instantiating several S-TFC masters to allow partitioning. The communication with the readout electronics is ensured by a shared high-speed optical link network for both the distribution of timing and synchronous control information, as well as trigger/throttle communication. An interface board (SOL40) with fan-out capabilities for timing and synchronous information and fan-in capabilities for throttle and rate regulation of the system interfaces S-ODIN to the new Readout Boards (TELL40). Moreover, the SOL40 board is responsible for distributing the timing and synchronous control information required by the Front-End electronics, and as the name implies, we have proposed that this board also takes care of the exchange of Experiment Control System (ECS) information with the FE electronics. We also describe how to provide a TFC system including ECS control for stand-alone use in test benches based on the SOL40. As required for the calorimeter and the muon interaction trigger, the new S-TFC architecture also allows hybrid operation by supporting the old TTC-based readout control. At the end, we also outline the necessary validation tests which are in progress.