Cargando…

Proposal for a fast, zero suppressing circuit for the digitization of analog pulses over long memory times

Detalles Bibliográficos
Autor principal:	Bourgeois, F
Lenguaje:	eng
Publicado:	1983
Materias:	Detectors and Experimental Techniques
Acceso en línea:	http://cds.cern.ch/record/143602

Ejemplares similares

Design and characteristics of a 32-channel, 100 MHz, zero suppressing, FASTBUS pulse shape digitizer
por: Bourgeois, F, et al.
Publicado: (1984)

A 66 MHz, 32-channel analog memory circuit with data selection for fast silicon detectors
por: Munday, D J, et al.
Publicado: (1992)

A transistorized circuit for limiting and shaping the input pulses to a fast coincidence circuit
por: York, C M
Publicado: (1960)

A micro-pipelined zero suppression, trigger matching and recalibration integrated circuit
por: Christiansen, J, et al.
Publicado: (1994)

A Zero Suppression Micro-Circuit for Binary Readout CMOS Monolithic Sensors
por: Himmi, A, et al.
Publicado: (2009)

Fast zero level trigger
por: Kulikov, A
Publicado: (1998)

A pulse-width modulation circuit for the remote readout of very long shift registers
por: Beer, Arno Siegfried, et al.
Publicado: (1978)

High rate large dynamic range analog circuitry and digitizers for fast calorimeter
por: Hallgren, Björn I, et al.
Publicado: (1996)

ADAM: a signal processing chip with analog memory storage and analog or digital output for the ATLAS outer tracker readout
por: Anghinolfi, F, et al.
Publicado: (1994)

A multichannel analog pulse generator
por: Fabozzi, F, et al.
Publicado: (1997)

CMOS pixel sensor development: a fast read-out architecture with integrated zero suppression
por: Hu-Guo, Ch, et al.
Publicado: (2009)

A proposal for zero energy spread injection into CESAR
por: Koziol, H, et al.
Publicado: (1966)

A linear gate for nanosecond analog pulses
por: Dieulot, J M, et al.
Publicado: (1994)

Radiation hard analog circuits for ALICE ITS upgrade
por: Gajanana, D, et al.
Publicado: (2016)

2-D zero suppression scheme
por: Callot, O
Publicado: (1999)

A first-level digital buffer with micropipelined data recalibration, selective zero suppression and trigger matching
por: Christiansen, J, et al.
Publicado: (1992)

Ultra-fast circuit breaker
por: CERN. Geneva. Super Proton Synchrotron Division (SPS)
Publicado: (1974)

Design and Characterisation of a Fast Architecture Providing Zero Suppressed Digital Output Integrated in a High Resolution CMOS Pixel Sensor for the STAR Vertex Detector and the EUDET Beam Telescope
por: Hu-guo, C
Publicado: (2008)

A 65 nm CMOS analog processor with zero dead time for future pixel detectors
por: Gaioni, L, et al.
Publicado: (2017)

A fast pulse encoder
por: Pizer, Henry Ian
Publicado: (1963)

Method for the interrogation of FBG thermo-hygrometer through full analog circuit
por: Marrazzo, Vincenzo Romano, et al.
Publicado: (2023)

The mixed analog/digital shaper of the LHCb preshower
por: Lecoq, J, et al.
Publicado: (2001)

High-speed 16-BIT digital-to analog converter and digital deglitcher
por: CERN. Geneva. Super Proton Synchrotron Division (SPS)
Publicado: (1974)

An Analog-to-Digital Converter Module with Signal Shape Digitization for the VES Experiment
por: Volkov, E V, et al.
Publicado: (2020)

Silicon Tracker zero-suppressed data model and decoding
por: Needham, M
Publicado: (2009)

A fast charge integrating and shaping circuit
por: Kulka, Zbigniew, et al.
Publicado: (1990)

A bipolar analog front-end integrated circuit for the SDC silicon tracker
por: Kipnis, I, et al.
Publicado: (1993)

System Modelling and Improvements of a Mixed Analog Digital Chip for Ionization Chamber Readout in Static and Pulsed Fields
por: Laforge, Clyde
Publicado: (2022)

Proposal for an experiment with fast K$^{+}$-Mesons
por: CERN. Geneva. Track Chamber Committee
Publicado: (1961)

FastIC: a fast integrated circuit for the readout of high performance detectors
por: Gómez, S, et al.
Publicado: (2022)

Study of Analog-to-Digital converters for the TPC prototype for ALICE
por: Szymanski, P
Publicado: (1998)

Optically Isolated High Voltage Digital to Analog Converter
por: Dugad, Shashikant, et al.
Publicado: (2005)

A Mixed Analog/Digital Shaper for the LHCb Preshower
por: Böhner, G, et al.
Publicado: (1999)

Data Economy and Zero Suppression of the Liquid Argon Calorimetry Record
por: Caron, B, et al.
Publicado: (2003)

A LVL2 Zero Suppression Algorithm for TRT Data
por: Scholte, R, et al.
Publicado: (2002)

Data Compression on Zero Suppressed High Energy Physics Data
por: Schindler, M, et al.
Publicado: (1996)

Zero Suppression and Data Compression for SDD Output in the ALICE Experiment
por: Alberici, G, et al.
Publicado: (1999)

MALICE: a full custom analog memory for ALICE
por: Ayachi, M, et al.
Publicado: (1996)

ADeLine: analog memory for sparse data sampling
por: Panebianco, S, et al.
Publicado: (1997)

A 500 MHz CCD serial analog memory
por: Cresswell, J V, et al.
Publicado: (1986)

Cannot write session to /tmp/vufind_sessions/sess_6bglra458cia0hg46psl6clbmu