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Performance and Upgrade Plans of the LHCb Trigger System
The trigger of the LHCb experiment consists of two stages : an initial hardware trigger, and a high-level trigger implemented in a farm of parallel-processing CPUs. It reduces the event rate from an input of 15 MHz to an output rate of around 4 kHz. In order to maximize efficiencies and minimize bia...
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| Lenguaje: | eng |
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2012
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| Acceso en línea: | https://dx.doi.org/10.1016/j.nima.2012.08.076 http://cds.cern.ch/record/1443000 |