Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture

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The increased collision rate and pile-up produced at the HLLHC requires a substantial upgrade of the ATLAS level-1 trigger in order to maintain a broad physics reach. We show that tracking information can be used to control trigger rates, and describe a proposal for how this information can be extra...

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Autor principal: Cooper, B
Lenguaje:eng
Publicado: 2012
Materias:
Detectors and Experimental Techniques
Acceso en línea:http://cds.cern.ch/record/1477738
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author Cooper, B
author_facet Cooper, B
author_sort Cooper, B
collection CERN
description The increased collision rate and pile-up produced at the HLLHC requires a substantial upgrade of the ATLAS level-1 trigger in order to maintain a broad physics reach. We show that tracking information can be used to control trigger rates, and describe a proposal for how this information can be extracted within a two-stage level-1 trigger design that has become the baseline for the HLLHC upgrade. We demonstrate that, in terms of the communication between the external processing and the tracking detector frontends, a hardware solution is possible that fits within the latency constraints of level-1.
id cern-1477738
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2012
record_format invenio
spelling cern-14777382019-09-30T06:29:59Zhttp://cds.cern.ch/record/1477738engCooper, BInstrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End ArchitectureDetectors and Experimental TechniquesThe increased collision rate and pile-up produced at the HLLHC requires a substantial upgrade of the ATLAS level-1 trigger in order to maintain a broad physics reach. We show that tracking information can be used to control trigger rates, and describe a proposal for how this information can be extracted within a two-stage level-1 trigger design that has become the baseline for the HLLHC upgrade. We demonstrate that, in terms of the communication between the external processing and the tracking detector frontends, a hardware solution is possible that fits within the latency constraints of level-1.ATL-DAQ-SLIDE-2012-514oai:cds.cern.ch:14777382012-09-12
spellingShingle Detectors and Experimental Techniques
Cooper, B
Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture
title Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture
title_full Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture
title_fullStr Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture
title_full_unstemmed Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture
title_short Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture
title_sort instrumentation of a level-1 track trigger at atlas with double buffer front-end architecture
topic Detectors and Experimental Techniques
url http://cds.cern.ch/record/1477738
work_keys_str_mv AT cooperb instrumentationofalevel1tracktriggeratatlaswithdoublebufferfrontendarchitecture

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