Cargando…

Development and Implementation of Optimal Filtering in a Virtex FPGA for the Upgrade of the ATLAS LAr Calorimeter Readout

In the context of upgraded read-out systems for the Liquid-Argon Calorimeters of the ATLAS detector, modified front-end, back-end and trigger electronics are foreseen for operation at the High-Luminosity LHC. Accuracy and efficiency of the energy measurement and reliability of pile-up suppression ar...

Descripción completa

Detalles Bibliográficos
Autor principal: Stärz, S
Lenguaje:eng
Publicado: 2012
Materias:
Acceso en línea:http://cds.cern.ch/record/1478151
_version_ 1780925587907411968
author Stärz, S
author_facet Stärz, S
author_sort Stärz, S
collection CERN
description In the context of upgraded read-out systems for the Liquid-Argon Calorimeters of the ATLAS detector, modified front-end, back-end and trigger electronics are foreseen for operation at the High-Luminosity LHC. Accuracy and efficiency of the energy measurement and reliability of pile-up suppression are substantial when processing the detector raw-data in real-time. Several digital filter algorithms are investigated for their performance to extract energies from incoming trigger signals and for the needs of the future trigger system. The implementation of fast, resource economizing, parameter driven filter algorithms in a modern Virtex FPGA is presented.
id cern-1478151
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2012
record_format invenio
spelling cern-14781512019-09-30T06:29:59Zhttp://cds.cern.ch/record/1478151engStärz, SDevelopment and Implementation of Optimal Filtering in a Virtex FPGA for the Upgrade of the ATLAS LAr Calorimeter ReadoutDetectors and Experimental TechniquesIn the context of upgraded read-out systems for the Liquid-Argon Calorimeters of the ATLAS detector, modified front-end, back-end and trigger electronics are foreseen for operation at the High-Luminosity LHC. Accuracy and efficiency of the energy measurement and reliability of pile-up suppression are substantial when processing the detector raw-data in real-time. Several digital filter algorithms are investigated for their performance to extract energies from incoming trigger signals and for the needs of the future trigger system. The implementation of fast, resource economizing, parameter driven filter algorithms in a modern Virtex FPGA is presented.ATL-LARG-SLIDE-2012-522oai:cds.cern.ch:14781512012-09-14
spellingShingle Detectors and Experimental Techniques
Stärz, S
Development and Implementation of Optimal Filtering in a Virtex FPGA for the Upgrade of the ATLAS LAr Calorimeter Readout
title Development and Implementation of Optimal Filtering in a Virtex FPGA for the Upgrade of the ATLAS LAr Calorimeter Readout
title_full Development and Implementation of Optimal Filtering in a Virtex FPGA for the Upgrade of the ATLAS LAr Calorimeter Readout
title_fullStr Development and Implementation of Optimal Filtering in a Virtex FPGA for the Upgrade of the ATLAS LAr Calorimeter Readout
title_full_unstemmed Development and Implementation of Optimal Filtering in a Virtex FPGA for the Upgrade of the ATLAS LAr Calorimeter Readout
title_short Development and Implementation of Optimal Filtering in a Virtex FPGA for the Upgrade of the ATLAS LAr Calorimeter Readout
title_sort development and implementation of optimal filtering in a virtex fpga for the upgrade of the atlas lar calorimeter readout
topic Detectors and Experimental Techniques
url http://cds.cern.ch/record/1478151
work_keys_str_mv AT starzs developmentandimplementationofoptimalfilteringinavirtexfpgafortheupgradeoftheatlaslarcalorimeterreadout