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Design for embedded image processing on FPGAs

"Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit...

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Detalles Bibliográficos
Autor principal: Bailey, Donald G
Lenguaje:eng
Publicado: John Wiley & Sons (Asia) 2011
Materias:
Acceso en línea:http://cds.cern.ch/record/1481033
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author Bailey, Donald G
author_facet Bailey, Donald G
author_sort Bailey, Donald G
collection CERN
description "Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned"--
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institution Organización Europea para la Investigación Nuclear
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publishDate 2011
publisher John Wiley & Sons (Asia)
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spelling cern-14810332021-04-22T00:21:09Zhttp://cds.cern.ch/record/1481033engBailey, Donald GDesign for embedded image processing on FPGAsEngineering"Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned"--"The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation"--John Wiley & Sons (Asia)oai:cds.cern.ch:14810332011
spellingShingle Engineering
Bailey, Donald G
Design for embedded image processing on FPGAs
title Design for embedded image processing on FPGAs
title_full Design for embedded image processing on FPGAs
title_fullStr Design for embedded image processing on FPGAs
title_full_unstemmed Design for embedded image processing on FPGAs
title_short Design for embedded image processing on FPGAs
title_sort design for embedded image processing on fpgas
topic Engineering
url http://cds.cern.ch/record/1481033
work_keys_str_mv AT baileydonaldg designforembeddedimageprocessingonfpgas