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Computer Architecture Techniques for Power-Efficiency

In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performanc...

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Detalles Bibliográficos
Autores principales: Kaxiras, Stefanos, Martonosi, Margaret
Lenguaje:eng
Publicado: Morgan & Claypool Publishers 2008
Materias:
Acceso en línea:http://cds.cern.ch/record/1486451
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author Kaxiras, Stefanos
Martonosi, Margaret
author_facet Kaxiras, Stefanos
Martonosi, Margaret
author_sort Kaxiras, Stefanos
collection CERN
description In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these
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institution Organización Europea para la Investigación Nuclear
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publishDate 2008
publisher Morgan & Claypool Publishers
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spelling cern-14864512021-04-22T00:17:39Zhttp://cds.cern.ch/record/1486451engKaxiras, StefanosMartonosi, MargaretComputer Architecture Techniques for Power-EfficiencyComputing and ComputersIn the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of theseMorgan & Claypool Publishersoai:cds.cern.ch:14864512008
spellingShingle Computing and Computers
Kaxiras, Stefanos
Martonosi, Margaret
Computer Architecture Techniques for Power-Efficiency
title Computer Architecture Techniques for Power-Efficiency
title_full Computer Architecture Techniques for Power-Efficiency
title_fullStr Computer Architecture Techniques for Power-Efficiency
title_full_unstemmed Computer Architecture Techniques for Power-Efficiency
title_short Computer Architecture Techniques for Power-Efficiency
title_sort computer architecture techniques for power-efficiency
topic Computing and Computers
url http://cds.cern.ch/record/1486451
work_keys_str_mv AT kaxirasstefanos computerarchitecturetechniquesforpowerefficiency
AT martonosimargaret computerarchitecturetechniquesforpowerefficiency