Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture

Around 2021 the Large Hadron Collider will be upgraded to provide instantaneous luminosities 5x10^34, leading to excessive rates from the ATLAS Level-1 trigger. We describe a double-buffer front-end architecture for the ATLAS tracker replacement which should enable tracking information to be used in the Level-1 decision. This will allow Level-1 rates to be controlled whilst preserving high efficiency for single lepton triggers at relatively low transverse momentum thresholds pT ~25 GeV, enabling ATLAS to remain sensitive to physics at the electroweak scale. In particular, a potential hardware solution for the communication between the upgraded silicon barrel strip detectors and the external processing within this architecture will be described, and discrete event simulations used to demonstrate that this fits within the tight latency constraints.