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Reconfigurable Networks-on-Chip
This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing...
Autores principales: | , , , |
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Lenguaje: | eng |
Publicado: |
Springer
2012
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1007/978-1-4419-9341-0 http://cds.cern.ch/record/1503624 |
_version_ | 1780927144398946304 |
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author | Chen, Sao-Jie Lan, Ying-Cherng Tsai, Wen-Chung Hu, Yu-Hen |
author_facet | Chen, Sao-Jie Lan, Ying-Cherng Tsai, Wen-Chung Hu, Yu-Hen |
author_sort | Chen, Sao-Jie |
collection | CERN |
description | This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation. Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC. From the Foreword: Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers. --Giovanni De Micheli |
id | cern-1503624 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2012 |
publisher | Springer |
record_format | invenio |
spelling | cern-15036242021-04-21T23:54:43Zdoi:10.1007/978-1-4419-9341-0http://cds.cern.ch/record/1503624engChen, Sao-JieLan, Ying-CherngTsai, Wen-ChungHu, Yu-HenReconfigurable Networks-on-ChipEngineeringThis book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation. Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC. From the Foreword: Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers. --Giovanni De MicheliSpringeroai:cds.cern.ch:15036242012 |
spellingShingle | Engineering Chen, Sao-Jie Lan, Ying-Cherng Tsai, Wen-Chung Hu, Yu-Hen Reconfigurable Networks-on-Chip |
title | Reconfigurable Networks-on-Chip |
title_full | Reconfigurable Networks-on-Chip |
title_fullStr | Reconfigurable Networks-on-Chip |
title_full_unstemmed | Reconfigurable Networks-on-Chip |
title_short | Reconfigurable Networks-on-Chip |
title_sort | reconfigurable networks-on-chip |
topic | Engineering |
url | https://dx.doi.org/10.1007/978-1-4419-9341-0 http://cds.cern.ch/record/1503624 |
work_keys_str_mv | AT chensaojie reconfigurablenetworksonchip AT lanyingcherng reconfigurablenetworksonchip AT tsaiwenchung reconfigurablenetworksonchip AT huyuhen reconfigurablenetworksonchip |