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Generating Analog IC Layouts with LAYGEN II
This book presents an innovative methodology for the automatic generation of analog integrated circuits (ICs) layout, based on template descriptions and on evolutionary computational techniques. A design automation tool, LAYGEN II, was implemented to validate the proposed approach giving special emp...
Autores principales: | , , |
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Lenguaje: | eng |
Publicado: |
Springer
2013
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1007/978-3-642-33146-6 http://cds.cern.ch/record/1513031 |
_version_ | 1780928169210019840 |
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author | Martins, Ricardo M F Lourenço, Nuno C C Horta, Nuno C G |
author_facet | Martins, Ricardo M F Lourenço, Nuno C C Horta, Nuno C G |
author_sort | Martins, Ricardo M F |
collection | CERN |
description | This book presents an innovative methodology for the automatic generation of analog integrated circuits (ICs) layout, based on template descriptions and on evolutionary computational techniques. A design automation tool, LAYGEN II, was implemented to validate the proposed approach giving special emphasis to reusability of expert design knowledge and to efficiency on retargeting operations. |
id | cern-1513031 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2013 |
publisher | Springer |
record_format | invenio |
spelling | cern-15130312021-04-21T23:26:51Zdoi:10.1007/978-3-642-33146-6http://cds.cern.ch/record/1513031engMartins, Ricardo M FLourenço, Nuno C CHorta, Nuno C GGenerating Analog IC Layouts with LAYGEN IIEngineeringThis book presents an innovative methodology for the automatic generation of analog integrated circuits (ICs) layout, based on template descriptions and on evolutionary computational techniques. A design automation tool, LAYGEN II, was implemented to validate the proposed approach giving special emphasis to reusability of expert design knowledge and to efficiency on retargeting operations.Springeroai:cds.cern.ch:15130312013 |
spellingShingle | Engineering Martins, Ricardo M F Lourenço, Nuno C C Horta, Nuno C G Generating Analog IC Layouts with LAYGEN II |
title | Generating Analog IC Layouts with LAYGEN II |
title_full | Generating Analog IC Layouts with LAYGEN II |
title_fullStr | Generating Analog IC Layouts with LAYGEN II |
title_full_unstemmed | Generating Analog IC Layouts with LAYGEN II |
title_short | Generating Analog IC Layouts with LAYGEN II |
title_sort | generating analog ic layouts with laygen ii |
topic | Engineering |
url | https://dx.doi.org/10.1007/978-3-642-33146-6 http://cds.cern.ch/record/1513031 |
work_keys_str_mv | AT martinsricardomf generatinganalogiclayoutswithlaygenii AT lourenconunocc generatinganalogiclayoutswithlaygenii AT hortanunocg generatinganalogiclayoutswithlaygenii |