Cargando…

Verification, validation, and testing of engineered systems

Detalles Bibliográficos
Autor principal:	Engel, Avner
Lenguaje:	eng
Publicado:	J Wiley & Sons 2010
Materias:	Engineering
Acceso en línea:	http://cds.cern.ch/record/1521554

Ejemplares similares

Practical creativity and innovation in systems engineering
por: Engel, Avner
Publicado: (2018)

Reliability verification, testing and analysis in engineering design
por: Wasserman, Gary S
Publicado: (2002)

Verification, validation and testing in software engineering /
Publicado: (2007)

Computer logic, testing and verification
por: Roth, John Paul
Publicado: (1980)

Guidance for the verification and validation of neural networks
por: Pullum, L, et al.
Publicado: (2007)

Electronic design automation for IC system design, verification, and testing
por: Lavagno, Luciano, et al.
Publicado: (2016)

Verification methodology manual for SystemVerilog
por: Bergeron, Janick, et al.
Publicado: (2006)

Shipboard power systems design and verification fundamentals
por: Islam, Mohammed M
Publicado: (2018)

Verification of a Multipacting Computer Code and Analysis of an RF Test Cavity
por: Schulz, C
Publicado: (2004)

Functional verification of dynamically reconfigurable FPGA-based systems
por: Gong, Lingkan, et al.
Publicado: (2015)

Automation of PDF generation, validation and verification
por: Ciforac, Andreea Denisa
Publicado: (2021)

Advanced verification topics
por: Bhattacharya, Bishnupriya, et al.
Publicado: (2011)

Principles of functional verification
por: Meyer, Andreas
Publicado: (2004)

Verification and validation in computational science and engineering
por: Roache, P J
Publicado: (1998)

The inverse method: parametric verification of real-time embedded systems
por: André , Etienne, et al.
Publicado: (2013)

Security policy in system-on-chip designs: specification, implementation and verification
por: Ray, Sandip, et al.
Publicado: (2018)

ESL Design and Verification: A Prescription for Electronic System Level Methodology
por: Bailey, Brian
Publicado: (2007)

Embedded software verification and debugging
por: Lettnin, Djones, et al.
Publicado: (2017)

Logic synthesis and verification algorithms
por: Hachtel, Gary D
Publicado: (1996)

Pistons and engine testing
por: MAHLE GmbH
Publicado: (2016)

Pistons and engine testing
por: GmbH, Mahle
Publicado: (2012)

Functional verification coverage measurement and analysis
por: Piziali, Andrew
Publicado: (2007)

Effective Functional Verification: Principles and Processes
por: Vasudevan, Srivatsa
Publicado: (2006)

Accuracy verification methods: theory and algorithms
por: Mali, Olli, et al.
Publicado: (2014)

Low-power design and power-aware verification
por: Khondkar, Progyna
Publicado: (2017)

Simulation Environment Based on the Universal Verification Methodology
por: Fiergolski, Adrian
Publicado: (2017)

Modelling and simulation of integrated systems in engineering: issues of methodology, quality, testing and application
por: Murray-Smith, D J
Publicado: (2012)

Equivalence and noninferiority tests for quality, manufacturing and test engineers
por: Pardo, Scott
Publicado: (2014)

Lean for systems engineering with lean enablers for systems engineering
por: Oppenheim, Bohdan W
Publicado: (2011)

IET wiring regulations: design and verification of electrical installations
por: Scaddan, Brian
Publicado: (2018)

Formal verification: an essential toolkit for modern VLSI design
por: Seligman, Erik, et al.
Publicado: (2015)

New data structures and algorithms for logic synthesis and verification
por: Amaru, Luca Gaetano
Publicado: (2017)

ASIC and FPGA Verification: A Guide to Component Modeling
por: Munden, Richard
Publicado: (2004)

System-Level Validation: High-Level Modeling and Directed Test Generation Techniques
por: Chen, Mingsong, et al.
Publicado: (2013)

Fundamentals of IP and SoC security: design, verification, and debug
por: Bhunia, Swarup, et al.
Publicado: (2017)

Formal verification of Simulink/Stateflow diagrams: a deductive approach
por: Zhan, Naijun, et al.
Publicado: (2017)

A practical guide to adopting the Universal Verification Methodology (UVM)
por: Rosenberg, Sharon, et al.
Publicado: (2013)

Hardware design verification: simulation and formal method-based approaches
por: Lam, William K C
Publicado: (2005)

Laser systems engineering
por: Kasunic, Keith J
Publicado: (2016)

Control systems engineering
por: Salivahanan, S, et al.
Publicado: (2014)

Cannot write session to /tmp/vufind_sessions/sess_g6vbqtob2o2l8191ksgdtv0mu3