An SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgrade

This note describes a new algorithm for the VELO Pixel track reconstruction for the LHCb upgrade. Our tracking algorithm implementation was designed with parallelism in mind for an easy adoption in many-core architectures, like GPGPUs. First, CPU vectorization units are explored as an attempts to sp...

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Detalles Bibliográficos
Autores principales: Ticse, Royer, Cámpora Pérez, Daniel Hugo, Schwemmer, Rainer, Neufeld, Niko
Lenguaje:eng
Publicado: 2013
Materias:
Computing and Computers
Acceso en línea:http://cds.cern.ch/record/1554078
Descripción
Sumario:This note describes a new algorithm for the VELO Pixel track reconstruction for the LHCb upgrade. Our tracking algorithm implementation was designed with parallelism in mind for an easy adoption in many-core architectures, like GPGPUs. First, CPU vectorization units are explored as an attempts to speedup a critical section of the current implementation. Then, studies on parallel processing technique are presented, with a draft design for many-core architectures.

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