An SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgrade

This note describes a new algorithm for the VELO Pixel track reconstruction for the LHCb upgrade. Our tracking algorithm implementation was designed with parallelism in mind for an easy adoption in many-core architectures, like GPGPUs. First, CPU vectorization units are explored as an attempts to sp...

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Detalles Bibliográficos
Autores principales: Ticse, Royer, Cámpora Pérez, Daniel Hugo, Schwemmer, Rainer, Neufeld, Niko
Lenguaje:eng
Publicado: 2013
Materias:
Computing and Computers
Acceso en línea:http://cds.cern.ch/record/1554078
_version_ 1780930359443062784
author Ticse, Royer
Cámpora Pérez, Daniel Hugo
Schwemmer, Rainer
Neufeld, Niko
author_facet Ticse, Royer
Cámpora Pérez, Daniel Hugo
Schwemmer, Rainer
Neufeld, Niko
author_sort Ticse, Royer
collection CERN
description This note describes a new algorithm for the VELO Pixel track reconstruction for the LHCb upgrade. Our tracking algorithm implementation was designed with parallelism in mind for an easy adoption in many-core architectures, like GPGPUs. First, CPU vectorization units are explored as an attempts to speedup a critical section of the current implementation. Then, studies on parallel processing technique are presented, with a draft design for many-core architectures.
id cern-1554078
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2013
record_format invenio
spelling cern-15540782019-09-30T06:29:59Zhttp://cds.cern.ch/record/1554078engTicse, RoyerCámpora Pérez, Daniel HugoSchwemmer, RainerNeufeld, NikoAn SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgradeComputing and ComputersThis note describes a new algorithm for the VELO Pixel track reconstruction for the LHCb upgrade. Our tracking algorithm implementation was designed with parallelism in mind for an easy adoption in many-core architectures, like GPGPUs. First, CPU vectorization units are explored as an attempts to speedup a critical section of the current implementation. Then, studies on parallel processing technique are presented, with a draft design for many-core architectures.LHCb-PUB-2013-007CERN-LHCb-PUB-2013-007LHCb-INT-2013-030oai:cds.cern.ch:15540782013-06-07
spellingShingle Computing and Computers
Ticse, Royer
Cámpora Pérez, Daniel Hugo
Schwemmer, Rainer
Neufeld, Niko
An SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgrade
title An SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgrade
title_full An SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgrade
title_fullStr An SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgrade
title_full_unstemmed An SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgrade
title_short An SIMD parallel version of the VELO Pixel track reconstruction for the LHCb upgrade
title_sort simd parallel version of the velo pixel track reconstruction for the lhcb upgrade
topic Computing and Computers
url http://cds.cern.ch/record/1554078
work_keys_str_mv AT ticseroyer ansimdparallelversionofthevelopixeltrackreconstructionforthelhcbupgrade
AT camporaperezdanielhugo ansimdparallelversionofthevelopixeltrackreconstructionforthelhcbupgrade
AT schwemmerrainer ansimdparallelversionofthevelopixeltrackreconstructionforthelhcbupgrade
AT neufeldniko ansimdparallelversionofthevelopixeltrackreconstructionforthelhcbupgrade
AT ticseroyer simdparallelversionofthevelopixeltrackreconstructionforthelhcbupgrade
AT camporaperezdanielhugo simdparallelversionofthevelopixeltrackreconstructionforthelhcbupgrade
AT schwemmerrainer simdparallelversionofthevelopixeltrackreconstructionforthelhcbupgrade
AT neufeldniko simdparallelversionofthevelopixeltrackreconstructionforthelhcbupgrade

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