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FSM-based digital design using Verilog HDL
| Autores principales: | , |
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| Lenguaje: | eng |
| Publicado: |
J. Wiley & Sons
2008
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/1555030 |
| _version_ | 1780930381381369856 |
|---|---|
| author | Minns, Peter D Elliott, Ian D |
| author_facet | Minns, Peter D Elliott, Ian D |
| author_sort | Minns, Peter D |
| collection | CERN |
| id | cern-1555030 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 2008 |
| publisher | J. Wiley & Sons |
| record_format | invenio |
| spelling | cern-15550302021-04-21T22:39:25Zhttp://cds.cern.ch/record/1555030engMinns, Peter DElliott, Ian DFSM-based digital design using Verilog HDLComputing and ComputersJ. Wiley & Sonsoai:cds.cern.ch:15550302008 |
| spellingShingle | Computing and Computers Minns, Peter D Elliott, Ian D FSM-based digital design using Verilog HDL |
| title | FSM-based digital design using Verilog HDL |
| title_full | FSM-based digital design using Verilog HDL |
| title_fullStr | FSM-based digital design using Verilog HDL |
| title_full_unstemmed | FSM-based digital design using Verilog HDL |
| title_short | FSM-based digital design using Verilog HDL |
| title_sort | fsm-based digital design using verilog hdl |
| topic | Computing and Computers |
| url | http://cds.cern.ch/record/1555030 |
| work_keys_str_mv | AT minnspeterd fsmbaseddigitaldesignusingveriloghdl AT elliottiand fsmbaseddigitaldesignusingveriloghdl |