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Studio di Rivelatori a Pixel di nuova generazione per il Sistema di Tracciamento di ATLAS.

In 2013 the LHC will undergo a long shutdown (Phase 0) in preparation for a an energy and luminosity upgrade. During this period the ATLAS Pixel Detector (that is the tracking detector closest to the beamline) will be upgraded. The new detector, called Insertable B-Layer (IBL), will be installed bet...

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Detalles Bibliográficos
Autor principal: Gaudiello, Andrea
Lenguaje:eng
Publicado: 2013
Materias:
Acceso en línea:http://cds.cern.ch/record/1557352
Descripción
Sumario:In 2013 the LHC will undergo a long shutdown (Phase 0) in preparation for a an energy and luminosity upgrade. During this period the ATLAS Pixel Detector (that is the tracking detector closest to the beamline) will be upgraded. The new detector, called Insertable B-Layer (IBL), will be installed between the existing pixel detector and a new beam-pipe of smaller radius in order to ensure and maintain excellent performance of tracking, vertexing and jet flavor tagging. To satisfy the new requirements a new electronic front- end (FE-I4) and 2 sensor technologies have been developed: Planar and 3D. Genova is one of two sites dedicated to the assembly of the modules of IBL. The work is then carried out in two parallel directions: on one hand the production and its optimization; on the other the comparison and testing of these new technologies. Chapter 1 gives an overview of the theoretical framework needed to understand the importance and the goals of the experiments operating at the Large Hadron Collider (LHC), while Chapter 2 describes the ATLAS experiment and its upgrade schedule. Chapter 3 an overview of semiconductor tracking detectors is given and Chapter 4 describes the Insertable B-Layer project, in particular describing the Planar and 3D sensor technologies. Chapter 5 presents the modules assembly procedure and their qualication. Moreover some results of my work as software implementation of devices and stud- ies on module gluing are shown. The last Chapter (6) deals with the optimizations that I have done to improve the module qualification procedure and some studies on Planar and 3D technology.