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Testing Digital Electronic Protection Systems

This paper outlines the core concepts and realisation of the Safe Machine Parameters Controller (SMPC) testbench, based on a VME crate and LabVIEW program. Its main goal is to ensure the correct function of the SMPC for the protection of the CERN accelerator complex. To achieve this, the tester...

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Detalles Bibliográficos
Autores principales: Gabourin, S, Garcia Muñoz, A
Lenguaje:eng
Publicado: 2011
Acceso en línea:http://cds.cern.ch/record/1563823
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author Gabourin, S
Garcia Muñoz, A
author_facet Gabourin, S
Garcia Muñoz, A
author_sort Gabourin, S
collection CERN
description This paper outlines the core concepts and realisation of the Safe Machine Parameters Controller (SMPC) testbench, based on a VME crate and LabVIEW program. Its main goal is to ensure the correct function of the SMPC for the protection of the CERN accelerator complex. To achieve this, the tester has been built to replicate the machine environment and operation, in order to ensure that the chassis under test is completely exercised. The complexity of the task increases with the number of input combinations. This paper also outlines the benefits and weaknesses of developing a test suite independently of the hardware being tested, using the “V” approach.
id cern-1563823
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2011
record_format invenio
spelling cern-15638232022-08-17T13:32:37Zhttp://cds.cern.ch/record/1563823engGabourin, SGarcia Muñoz, ATesting Digital Electronic Protection SystemsThis paper outlines the core concepts and realisation of the Safe Machine Parameters Controller (SMPC) testbench, based on a VME crate and LabVIEW program. Its main goal is to ensure the correct function of the SMPC for the protection of the CERN accelerator complex. To achieve this, the tester has been built to replicate the machine environment and operation, in order to ensure that the chassis under test is completely exercised. The complexity of the task increases with the number of input combinations. This paper also outlines the benefits and weaknesses of developing a test suite independently of the hardware being tested, using the “V” approach.oai:cds.cern.ch:15638232011
spellingShingle Gabourin, S
Garcia Muñoz, A
Testing Digital Electronic Protection Systems
title Testing Digital Electronic Protection Systems
title_full Testing Digital Electronic Protection Systems
title_fullStr Testing Digital Electronic Protection Systems
title_full_unstemmed Testing Digital Electronic Protection Systems
title_short Testing Digital Electronic Protection Systems
title_sort testing digital electronic protection systems
url http://cds.cern.ch/record/1563823
work_keys_str_mv AT gabourins testingdigitalelectronicprotectionsystems
AT garciamunoza testingdigitalelectronicprotectionsystems