Variable resolution Associative Memory optimization and simulation for the ATLAS\nFastTracker project

ATLAS is planning to use a hardware processor, the Fast Tracker (FTK), to perform on-line track\nreconstruction at the level−1 event output rate (100 kHz). The processor can perform this task\nusing a very large number of precalculated track patterns stored in a dedicated bank and extracting\nthe ones compatible with a given event.\nIn order to obtain a better trade off between the number of patterns and the number of fits needed\nto complete tracking after the pattern matching, ATLAS FTK exploits variable resolution pattern\nmatching, carried out by a dedicated device, called Associative Memory (AM) chip, that includes\nternary logic, inspired from ternary commercial CAMs. This architecture is able to store the\nvariable resolution feature that tunes the precision of the match for each pattern and for each\ndetector layer, allowing the patterns to be of variable shape.\nWe have studied different methods of building the pattern bank exploiting different resolution\npattern matchings. We show how this new feature achieves the goal of having few enough patterns\nto fit in the hardware, while maintaining good efficiency and the required rejection against random\ncombinations of hits. We finally present a detailed preliminary study showing that the application\nof some degrees of variable resolution makes possible to build a bank that will allow the system\nto be fully functional at the luminosities and pileup conditions expected for the LHC after Phase-I\nupgrades.