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Design of an FPGA-based embedded system for the ATLAS Tile Calorimeter front-end electronics test-bench
The portable test bench (VME based) used for the certification of the Tile calorimeter front-end electronics has been redesigned for the LHC Long Shutdown (2013-2014) improving its portability. The new version is based on a Xilinx Virtex 5 FPGA that implements an embedded system using a hard core Po...
Autores principales: | , , , , , , , , , , |
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Lenguaje: | eng |
Publicado: |
2013
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/1601997 |
Sumario: | The portable test bench (VME based) used for the certification of the Tile calorimeter front-end electronics has been redesigned for the LHC Long Shutdown (2013-2014) improving its portability. The new version is based on a Xilinx Virtex 5 FPGA that implements an embedded system using a hard core PowerPC 440 microprocessor and custom IP cores. The PowerPC microprocessor runs a light Linux version and handles the IP cores written in VHDL that implement the different functionalities (TTC, G-Link, CAN-Bus) Description of the system and performance measurements of the different components will be shown. |
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