LHCb: SALT - new silicon strip readout chip for the LHCb Upgrade

The LHCb detector, operating at the LHC proton-proton collider, has finished its Run I period. After more than two years of collision data taking the experiment accumulated corresponding integrated luminosity of around 3.1 fb$^{-1}$. The full recorded data sample will be used by physicists to search for New Physics and precise measurement of CP-violation in heavy flavor quark sector. Despite its superb performance it is clear that the LHCb experiment is statistically limited for a number of important decay channels (such as $B_d \to K^*\mu \mu$ or $B_s \to \phi \phi$ ). This, in turn, is related to the current data acquisition architecture which can acquire data at the top rate of 1.1 MHz at the instantaneous luminosity close to 4x10$^{32}$ [cm$^{-2}$s$^{-1}$]. The LHC machine is already capable of delivering more than one order of magnitude higher luminosity that is presently used by the LHCb. This fact led the LHCb Collaboration to preparing a proposal regarding an upgrade of the LHCb spectrometer that would allow it to exploit higher luminosities (up to 2x10$^{33}$), greatly improve the trigger efficiencies for both hadronic and leptonic decay modes. The upgrade will allow the experiment to collect about 50 fb$^{-1}$ of data. One of the most important topic of the LHCb upgrade is design and implementation of new front-end electronics allowing a full detector read-out at the bunch-crossing rate of 40 MHz. This will be further augmented by a software trigger that will be capable of processing the data at the same rate. This talk presents a novel design of the common readout chip for silicon strip detectors which will be able to digitise the analogue signal on-detector and subsequently perform digital processing and zero-suppression.