Systems-on-Chip (SoC) for applications in High-Energy Physics

In view of the Time Projection Chamber for the future Linear Collider (LCTPC), a new front-end Application-Specic Integrated Circuit has been developed: the 16 channels Super-Altro Demonstrator. Given the small pad area of $1 \times 4mm^{2}$, the chip is a compact integrated system, including signal preamplifcation/shaping, 10-bit analog-to-digital conversion and digital signal processing. Adequate design techniques were used to reduce noise coupling between analog and digital parts of the system. The bunch train structure of the linear collider is exploited by the introduction of power pulsing features in the design, which result in a signicant reduction of the power consumption. The tests carried out show noise as low as 316 electrons and effectiveness of the power pulsing approach. Super-Altro can be used for studies of gaseous detector readout with classical wire chambers as well as modern GEMs and MicroMegas. This thesis also studies Analog-to-Digital Converters (ADC) suitable for integration in High-Energy Physics front-end systems. Simulations show the feasibility of a 12-bit 100MHz pipeline ADC in a 130nm CMOS technology.