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Turbo decoder architecture for beyond-4G applications

This book describes the most recent techniques for turbo decoder implementation, especially for 4G and beyond 4G applications. The authors reveal techniques for the design of high-throughput decoders for future telecommunication systems, enabling designers to reduce hardware cost and shorten process...

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Detalles Bibliográficos
Autores principales: Wong, Cheng-Chi, Chang, Hsie-Chia
Lenguaje:eng
Publicado: Springer 2013
Materias:
Acceso en línea:https://dx.doi.org/10.1007/978-1-4614-8310-6
http://cds.cern.ch/record/1625547
Descripción
Sumario:This book describes the most recent techniques for turbo decoder implementation, especially for 4G and beyond 4G applications. The authors reveal techniques for the design of high-throughput decoders for future telecommunication systems, enabling designers to reduce hardware cost and shorten processing time. Coverage includes an explanation of VLSI implementation of the turbo decoder, from basic functional units to advanced parallel architecture. The authors discuss both hardware architecture techniques and experimental results, showing the variations in area/throughput/performance with respec