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Embedded memory design for multi-core and systems on chip
This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test....
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Lenguaje: | eng |
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Springer
2014
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1007/978-1-4614-8881-1 http://cds.cern.ch/record/1627019 |
_version_ | 1780933830122668032 |
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author | Mohammad, Baker |
author_facet | Mohammad, Baker |
author_sort | Mohammad, Baker |
collection | CERN |
description | This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory. · Provides a comprehensive overview of embedded memory design and associated challenges and choices; · Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; · Includes detailed discussion of memory hierarchy and its impact on energy and performance; · Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis. |
id | cern-1627019 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2014 |
publisher | Springer |
record_format | invenio |
spelling | cern-16270192021-04-21T21:38:46Zdoi:10.1007/978-1-4614-8881-1http://cds.cern.ch/record/1627019engMohammad, BakerEmbedded memory design for multi-core and systems on chipEngineeringThis book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory. · Provides a comprehensive overview of embedded memory design and associated challenges and choices; · Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; · Includes detailed discussion of memory hierarchy and its impact on energy and performance; · Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.Springeroai:cds.cern.ch:16270192014 |
spellingShingle | Engineering Mohammad, Baker Embedded memory design for multi-core and systems on chip |
title | Embedded memory design for multi-core and systems on chip |
title_full | Embedded memory design for multi-core and systems on chip |
title_fullStr | Embedded memory design for multi-core and systems on chip |
title_full_unstemmed | Embedded memory design for multi-core and systems on chip |
title_short | Embedded memory design for multi-core and systems on chip |
title_sort | embedded memory design for multi-core and systems on chip |
topic | Engineering |
url | https://dx.doi.org/10.1007/978-1-4614-8881-1 http://cds.cern.ch/record/1627019 |
work_keys_str_mv | AT mohammadbaker embeddedmemorydesignformulticoreandsystemsonchip |